• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.334-337
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• 2005

We have found that the hysteretic behavior of a polymer stabilized ferroelectric liquid crystal system coincides with Blinov et. al's model qualitatively. The hysteresis inversion frequency could be promoted up to 7000 Hz by connecting external capacitor and resistor in serial. In addition, the influence of temperature and the amplitude of the applied field on hysteresis-free switching of the cell could be minimized.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.3
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• pp.213-225
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• 2002

Metal-Ferroelectric- Insulator- Silicon (MFIS) structured field effect transistor (FET) device was fabricated and characterized. Important issues to realize ferroelectric gate field effect transistor device were summarized in three sections. The choice of interlayer dielectric was made in the consideration of device functionality and chemical reaction between ferroelectric materials and silicon surface during fabrication process. Also, various ferroelectric thin film materials were taken into account to meet desired memory window and process compatibility. Finally, MFIS structured FET device was fabricated and important characteristics were discussed. For feasible integration of current device as random access memory array cell address schemes were also suggested.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.12
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• pp.1033-1044
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• 2002

In this Paper, a new FRAM design technique utilizing grounded-plate PMOS-gate (GPPG) ferroelectric cell is proposed. A GPPG cell consists of a PMOS access transistor and a ferroelectric data storage capacitor. Its plate is grounded. The proposed architecture employs three novel methods for cell operation: 1) $V_{DD}$ -precharged bitline, 2) negative-voltage wordline technique and 3) negative-pulse restore. Because this configuration doesn't need the plate control circuitry, it can greatly increase the memory cell efficiency. In addition, differently from other reported common-plate cells, this scheme can supply a sufficient voltage of $V_{DD}$ to the ferroelectric capacitor during detecting and storing the polarization on the cell. Thus, there is no restriction on low voltage operation. Furthermore, by employing a compact column-path circuitry which activates only needed 8-bit data, this architecture can minimize the current consumption of the memory array. A 4- Mb FRAM circuit has been designed with 0.3-um, triple-well/1-polycide/2-metal technology, and the possibility of the realization of GPPG cell architecture has been confirmed.

• Proceedings of the KIEE Conference
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• 2005.11a
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• pp.87-89
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• 2005

$Bi_{3.25}Y_{0.75}Ti_{3}O_{12}$[BYT] ferroelectric thin films were deposited by RF-Sputtering method on the $Pt/Ti/SiO_2/Si$. We investigated the effects of processing condition (especially post-annealing) on the structural and ferroelectric properties of the BYT thin films. Increasing the annealing temperature, the peak intensity of (117) increased and c-axis orientation decreased. The BYT thin films crystallized well at $600^{\circ}C$ for 30min. No secondary phases observed in the XRD pattern. At annealing temperature of $700^{\circ}C$, the thin films had no cracks and the grain was uniform. The calculated lattice constants of BYT thin films were a=0.539nm, b=0.536nm, c=3.288nm. The remnant polarization of the $Bi_{3.25}Y_{0.75}Ti_{3}O_{12}$ capacitor reached $1.8uC/cm^2$ at an applied field about 400kV/cm. The BYT thin films can be used as capacitors in Ferroelectric Random Access Memory device.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1997.04a
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• pp.217-221
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• 1997

We have investigated the ferroelectric properties of multi-layered SrBi$_2$Ta$_2$$O_{9}$Pb(Zr,Ti)O$_3$, SBT/PZT, thin film capacitors. Specimens were prepared onto Pt-coated Si wafer by sol-gel method. Ferroelectric properties of these finns could be obtained only for thin SBT layers below 50nm in thickness. The values of dielectric constant and remnant polarization depend mainly on the thickness of SBT layer, which arises from the paraelectric interface layer between SBT and PZT due to the thermal diffusion of Pb. The value of remnant poarization of PZT/SBT is greater than that of SBT, and the plarization fatigue behaviors of PZT/SBT/Pt capacitors are somewhat improved as compared with those of PZT/Pt.t.

• ETRI Journal
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• v.20 no.2
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• pp.241-249
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• 1998

The structure and electrical characteristics of metal-ferroelectric-semiconductor FET(MFSFET) for a single transistor memory are presented. The MFSFET was comprised of polysilicon islands as source/drain electrodes and $BaMgF_4$ film as a gate dielectric. The polysilicon source and drain were built-up prior to the formation of the ferroelectric film to suppress a degradation of the film due to high thermal cycles. From the MFS capacitor, the remnant polarization and coercive field were measured to be about $0.6{\mu}C/cm^2$ and 100 kV/cm, respectively. The fabricated MFSFETs also showed good hysteretic I-V curves, while the current levels disperse probably due to film cracking or bad adhesion between the film and the Al electrode.

• KIEE International Transactions on Electrophysics and Applications
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• v.11C no.2
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• pp.18-22
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• 2001

The thin films of high permitivity in ferroelectric materials using a capacitor are applied to DRAMs and FRAMs. (Ba, Sr)TiO$_3$ thin as ferroelectric materials were prepared by the sol-gel method and made by spin-coating on the Pt/Sio$_2$/Si substrate at 4,000 [rpm] for 10 seconds. The structural characteristics of the surface were analyzed by fractal dimension. The thickness of BST ceramics thin films was about 260∼280 [nm]. The property of the leakage current was stable with 10-9∼10-11[A] when the applied voltage was 0∼3[V]. BST thin films ha low leakage current properties when fractal dimension was low and a coating area was high.

• Proceedings of the Korean Ceranic Society Conference
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• 2000.10a
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• pp.182.2-182
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• 2000

• Proceedings of the Materials Research Society of Korea Conference
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• 1997.10a
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• pp.69-69
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• 1997

• Journal of the Korean Ceramic Society
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• v.44 no.8
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• pp.403-406
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• 2007

Ferroelectric Ce-doped $Bi_4Ti_3O_{12}$ (BCT) thin films were deposited by liquid delivery metal organic chemical vapor deposition (MOCVD) onto a $Pt(111)/Ti/SiO_2/Si(100)$ substrate. X-ray diffraction (XRD) and scanning electron microscopy (SEM) were used to identify the crystal structure, the surface, and the cross-section morphology of the deposited ferroelectric flims. After annealing above $640^{\circ}C$, the BCT films exhibited a polycrystalline structure with preferred (001) and (117) orientations. The BCT lam capacitor with a top Pt electrode showed a large remnant polarization ($2P_r$) of $44.56{\mu}C/cm^2$ at an applied voltage of 5 V and exhibited fatigue-free behavior up to $1.0{\times}10^{11}$ switching cycles at a frequency of 1 MHz. This study clearly reveals that BCT thin film has potential for application in non-volatile ferroelectric random access memories and dynamic random access memories.