• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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• pp.99-99
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• 2013

In this talk, I will present two research works in progress, which are: i) mapping of piezoelectric polarization and associated charge density distribution in the heteroepitaxial InGaN/GaN multi-quantum well (MQW) structure of a light emitting diode (LED) by using inline electron holography and ii) in-situ observation of the polarization switching process of an ferroelectric Pb(Zr1-x,Tix)O3 (PZT) thin film capacitor under an applied electric field in transmission electron microscope (TEM). In the first part, I will show that strain as well as total charge density distributions can be mapped quantitatively across all the functional layers constituting a LED, including n-type GaN, InGaN/GaN MQWs, and p-type GaN with sub-nm spatial resolution (~0.8 nm) by using inline electron holography. The experimentally obtained strain maps were verified by comparison with finite element method simulations and confirmed that not only InGaN QWs (2.5 nm in thickness) but also GaN QBs (10 nm in thickness) in the MQW structure are strained complementary to accommodate the lattice misfit strain. Because of this complementary strain of GaN QBs, the strain gradient and also (piezoelectric) polarization gradient across the MQW changes more steeply than expected, resulting in more polarization charge density at the MQW interfaces than the typically expected value from the spontaneous polarization mismatch alone. By quantitative and comparative analysis of the total charge density map with the polarization charge map, we can clarify what extent of the polarization charges are compensated by the electrons supplied from the n-doped GaN QBs. Comparison with the simulated energy band diagrams with various screening parameters show that only 60% of the net polarization charges are compensated by the electrons from the GaN QBs, which results in the internal field of ~2.0 MV cm-1 across each pair of GaN/InGaN of the MQW structure. In the second part of my talk, I will present in-situ observations of the polarization switching process of a planar Ni/PZT/SrRuO3 capacitor using TEM. We observed the preferential, but asymmetric, nucleation and forward growth of switched c-domains at the PZT/electrode interfaces arising from the built-in electric field beneath each interface. The subsequent sideways growth was inhibited by the depolarization field due to the imperfect charge compensation at the counter electrode and preexisting a-domain walls, leading to asymmetric switching. It was found that the preexisting a-domains split into fine a- and c-domains constituting a $90^{\circ}$ stripe domain pattern during the $180^{\circ}$ polarization switching process, revealing that these domains also actively participated in the out-of-plane polarization switching. The real-time observations uncovered the origin of the switching asymmetry and further clarified the importance of charged domain walls and the interfaces with electrodes in the ferroelectric switching processes.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 추계학술대회 논문집 학회본부 C
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• pp.801-803
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• 1998

We investigated Pt and $RuO_2$ as a bottom electrode and PZT thin film for ferroelectric applications. XRD examination shows that a mixed phase of (111) and (200) Pt peak for the temperature ranged from RT to $200^{\circ}C$, and a preferred (111) orientation for the substrate temperature of $300^{\circ}C$. From the XRD and AFM results, we recommend the substrate temperature of $300^{\circ}C$, 80 W for the Pt bottom electrode growth. From the study of an oxygen partial pressure from 0 to 50%, we learned that only Ru metal was grown with $0{\sim}5%$, a mixed phase of Ru and $RuO_2$ for $10{\sim}40%$, pure $RuO_2$ at 50%. Having optimized the bottom electrode growth conditions, we employed two step process in PZT film capacitor: PZT film growth at the low substrate temperature of $300^{\circ}C$ and then post RTA anneal treatments. PZT films were randomly oriented on $RuO_2$ and (110) preferentially oriented on Pt electrode. Leakage current density of PZT film demonstrated two to three orders higher for $RuO_2$ bottom electrode. From C-V results we observed a dielectric constant of PZT film higher than 1200. This paper presents the optimized process conditions of the bottom electrodes and properties of PZT thin films on these electrodes.

• 마이크로전자및패키징학회지
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• 제12권1호
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• pp.21-26
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• 2005

The field effect transistors (FETs) were fabricated ell $Y_2O_3/Si(100)$ substrates by the conventional memory processes and sol-gel process using $(Bi,La)Ti_3O_{12}(BLT)$ ferroelectric gate materials. The remnant polarization ($2Pr = Pr^+-Pr^-$) int Pt/BLT/Pt/Si capacitors increased from $22 {\mu}C/cm^2$ to $30{\mu}C/ cm^2$ at 5V as the annealing temperature increased from $700^{\circ}C$ to $750^{\circ}C$. There was no drastic degradation in the polarization values after applying the retention read pulse for $10^{5.5}$ seconds. The capacitance-voltage data of $Pt/BLT/Y_2O_3/Si$ capacitors at 5V input voltage showed that the memory window voltage decreased from 1.4V to 0.6V as the annealing temperature increased from $700^{\circ}C$ to $750^{\circ}C$. The leakage current of the $Pt/BLT/Y_2O_3/Si$ capacitors annealed at $750^{\circ}C$ was about $510^{-8}A/cm^2$ at 5V. From the drain currents versus gate voltages ($V_G$) for $Pt/BLT/Y_2O_3/Si(100)$ FET devices, the memory window voltages increased from 0.3V to 0.8V with increasing tile $V_G$ from 3V to 5V.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
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• pp.869-873
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• 2004

[ $Sr_xBa_{1-x}Nb_2O_6$ ] (SBN, $0.25{\leq}x{\leq}0.75$) ceramic is a ferroelectric material with tetragonal tungsten bronze (TTB) type structure, which has a high pyroelectric coefficient, piezoelectric, and a photo refractive properties. In this study, SBN60(x=0.6) thin film was manufactured by ion beam sputtering technique. Using the prepared SBN60 target in $Ar/O_2$ atmosphere as-deposited SBN60 thin film on Pt(100)/$TiO_2/SiO_2/Si$ substrate crystallization and orientation behavior as well as electric properties of SBN60 thin film were examined. SBN60 deposition up to $3000{\AA}$ in thickness, SBN60 thin film was heat-treated at $650^{\circ}C{\sim}800^{\circ}C$. The orientation was shown primarily along (001) plane from XRD pattern where working pressure was $4.3{\times}10^{-4}$ torr. The deposited layer was uniform, preferred orientatin and crystallization behavior resulted in the change of $O_2$ ratio was observed. In electric propertie of Pt/SBN60/Pt thin film capacitor remnant polarization (2Pr) value was $10{\mu}C/cm^2$, the coercive filed (Ec) 50 kV/cm, and the dielectric constant 615, respectively.

• 대한전자공학회논문지SD
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• 제37권4호
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• pp.1-6
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• 2000

최근에 빠른 쓰기/읽기 속도, 적은 소비 전력과 비휘발성을 가지는 메모리 캐패시터의 유전 재료로서 SrBi/sub 2/Ta/sub 2/O/sub 9/(SBT)에 대한 관심이 집중되고 있다. 강유전체 물질을 이용한 고밀도 FeRAM을 생산하기 위하여서는 식각에 의한 패턴이 형성되어야 한다. 강유전체 물질의 성장과 그 전기적 특성에 관한 연구와 발표는 많이 발표 되고 있다. 그러나, 강유전체 물질의 식각의 어려움 때문에 SBT 박막 식각에 관한 연구는 거의 전무하다고 할 수 있다. 그러므로, SBT 박막의 식각의 특성을 알아보기 위하여, SBT 박막은 CF/sub 4/Ar 가스 플라즈마를 이용하여 MEICP로 식각 되어졌다. XPS를 이용하여 식각 된 SBT 박막의 표면에서의 화학 반응을 분석하였고, XPS 분석을 검증하기 위하여 SIMS 분석을 하여 비교하였다.

• 한국세라믹학회지
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• 제41권1호
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• pp.13-18
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• 2004

$La_{0.5}Sr_{0.5}CoO_3$ (LSCO) electrodes were prepared on ferroelectric $Sr_{0.9}Bi_{2.1}Ta_2O_9$(SBT) thin films by spin coating method using photosensitive sol-gel solution. Self-patterning technique of photosensitive sol-gel solution has advantages such as simple manufacturing process compared to photoresist/dry etching process. Lanthanum(III) 2-methoxyethoxide, Stronitium diethoxide. Cobalu(II)2-methoxyethoxide were used as starting materials for LSCO electrode. UV irradiation on LSCO thin films lead to decrease solubility by M-O-M bond formation and the solubility difference allows us to obtain self-patternine. There was little composition change of the LSCO thin films between before leaching and after leaching in 2-methoxyethanol. The lowest resistivity of LSCO thin films deposited on $SiO_2$/Si substrate was $1.1{\times}10^{-2}{\Omega}cm$ when the thin film was ennealed at $740^{\circ}C$. The values of Pr/Ps and 2Pr of LSCO/SBT/Pt capacitor on the applied voltage of 5V were 0.51, 8.89 ${\mu}C/cm^2$, respectively.

• 대한전자공학회논문지SD
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• 제42권10호
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• pp.1-8
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• 2005

본 논문에서는 강유전체 메모리의 셀 효율을 높이기 위해 PMOS-gating 셀을 이용한 설계기법을 기술하였다. PMOS-gating 셀은 PMOS access 트랜지스터와 강유전체 커패시터로 이루어지며 커패시터의 플레이트는 ground에 고정된다. 아울러 read/write 동작시 비트라인이 $V_{DD}$로 precharge 되고, negative 전압 워드라인 기법이 사용되며, negative 펄스 restore 동작을 이용한다. 이는 셀 플레이트 구동없이 단순히 워드라인과 비트라인만 구동하여 메모리 셀의 데이타를 저장하고 읽어낼 수 있는 설계 방식으로, 기존의 셀 플레이트를 구동하는 FRAM 대비 메모리 셀 효율을 극대화 할 수 있어, multi-megabit 이상의 집적도에서 경쟁력 있는 칩 면적 구현이 가능하다. $0.25-{\mu}m$ triple-well 공정을 적용한 2.5-V, 1-Mb FRAM 시제품 설계를 통해 제안한 설계기술을 검증하였고, 시뮬레이션 결과 48 ns의 access time, 11 mA의 동작전류 특성을 보였다. 레이아웃 결과 칩 면적은 $3.22\;mm^{2}$ 이며, 기존의 셀 플레이트 구동기를 사용하는 FRAM 대비 약 $20\;\%$의 셀 효율을 개선하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
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• pp.817-820
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• 2004

The $Sr_{0.7}Bi_{2.6}Ta_2O_9$(SBT) thin films are deposited on Pt-coated electrode($Pt/TiO_2/SiO_2/Si$) using a RF magnetron sputtering method. The ferroelectric properties of SBT capacitors with annealing time were studied. In the SEM images, Bi-layered perovskite phase was crystallized at 10min and grains largely grew with annealing tune. SBT thin films are transformed from initial amorphous phase to the fully formed layer-structured perovskite. During the annealing process at $750^{\circ}C$, we found that an fluorite-like stage is formed after 3min. In the XRD pattern, the SBT thin films after 3min annealing time had (105) orientation. The ferroelectric properties of SBT capacitor with annealing time represent a favorable properties at 60 min. The maximum remanent polarization and the coercive electric field with 60 min are $12.40C/cm^2$ and 30kV/cm, respectively. The leakage current density with 60min is $6.81{\times}10^{-10}A/cm^2$.

• 센서학회지
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• 제11권1호
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• pp.48-53
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• 2002

강유전 물질인 $Pb_{0.99}[(Zr_{0.6}Sn_{0.4})_{1-x}Ti_x]_{0.98}Nb_{0.02}O_3$(PNZST) 박막을 10 mole%의 과잉 PbO가 첨가된 타겟을 이용하여 $La_{0.5}Sr_{0.5}CoO_3$(LSCO)/Pt/Ti/$SiO_2$/Si 기판상에 RF 마그네트론 스퍼터링 방법으로 증착하였다. Ti의 조성비를 변화시키면서 증착된 박막에 대하여 그 결정성과 전기적 특성을 조사하였다. 80 W의 RF 전력, $500^{\circ}C$의 기판온도에서 증착한 후, $650^{\circ}C$, 공기중에서 10초 동안 급속 열처리된 박막이 가장 우수한 페로브스카이트상으로 결정화되었다. 또한. Ti의 조성비가 10 mole%를 가지는 PNZST이 가장 우수한 결정성과 강유전 특성을 나타내었다. 이러한 박막으로 제작된 PNZST 커패시터는 약 $20\;{\mu}C/cm^2$정도의 잔류분극과 약 50 kV/cm 정도의 항전계를 나타내었으며, $2.2{\times}10^9$의 스위칭 후에도 잔류분극의 감소는 10% 미만이었다.

• 한국재료학회지
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• 제10권10호
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• pp.684-690
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• 2000

Metal-Ferroelectric-Metal(MFM) 구조의 개퍼시터에서 $Pb(Zr,Ti)O_3(PZT)$-전극 계면층이 PZT 박막 특성에 기여하는 영향을 알아보기 위하여 Pt/PZT/계면층/Pt/$TiO_2/SiO_2$/Si 구조의 캐퍼시터를 제작하였다. 계면층으로 사용될 물질들 중에서 $PbTiO_3(PT)$ 층을 sol-gel 방법으로 형성하였으며, PbO, $ZrO_2,\;TiO_2$ 층들을 reactive sputtering 방법으로 형성하였다. PZT박막을 구성하는 원소들로 이루어진 단순 산화물들의 특성을 평가하기 위하여 PbO, $ZrO_2,\;TiO_2$를 계면층으로 사용하여 $600^{\circ}C$에서 열처리를 실시하였고, 이 경우에는 $TiO_2$가 가장 우수하게 PZT의 결정립 크기를 미세하게 하는 효과를 보였으나, 두께가 증가함에 따라 표면 거칠기가 증가하고 anatase 상으로 남기 때문에 강유전특성이 열화되었다. 반면에 PT 박막을 계면층으로 사용한 경우에는 결정립 크기의 감소와 더불어 전기적인 특성도 향상되었다. 또한 PZT의 핵생성 위치를 판단하기 위하여 PT 삽입층의 위치를 변화하며, 실험한 결과, 하부전극과 PZT 박막의 계면에 PT 삽입층을 형성하였을 경우에 가장 효과적인 seed로서의 역할을 하였다.