• International Journal of Aeronautical and Space Sciences
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• v.17 no.4
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• pp.593-603
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• 2016

This paper presents the development of linear quadratic regulation and output tracking algorithms using output feedback when both the measurement and performance output equations contain direct feedthrough terms. Although all physical systems can be modeled without direct feedthrough, there are still many situations where system models with direct feedthrough are important. For this situation, we modify previous work on the same topic for systems without direct feedthrough. It is shown that for the regulation problem, the optimal output feedback gain for a direct feedthrough case can be directly obtained, via a transformation, from the approach used for systems without direct feedthrough. However, for the tracking problem, a new set of coupled matrix equations for determining the optimal output feedback gain is derived from the necessary conditions for minimizing the cost function. The effectiveness of the developed algorithms is demonstrated using numerical examples.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.1
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• pp.30-34
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• 1997

An improved clock-feedthrough compensation scheme for switche dcurrent system is proposed. Both the signal dependent and the constant clock-feedthrough terms are cancelled by using both NMOS and PMOS current samplers and by adopting a source replication technique. The proposed current memory cell was fabricated with 0.6$\mu$m CMOS process. Both experimental and theoretical results on clock-feedthrough error reveal substantial reduction over the existing compensation schemes.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2008.04a
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• pp.247-250
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• 2008

최근 무선통신용 LSI는 배터리 수명과 관련하여, 저전력 동작이 중요시되고 있다. 따라서 Digital CMOS 신호처리와 더불어 동작 가능한 SI (Switched-Current) circuit를 이용하는 Current-mode 신호처리가 주목받고 있다. 그러나 SI circuit의 기본인 Current Memory는 Charge Injection에 의한 Clock Feedthrough라는 문제점을 갖고 있기 때문에, 전류 전달에 있어서 오차를 발생시킨다. 본 논문에서는 Current Memory의 문제점인 Clock Feedthrough의 해결방안으로 CMOS Switch의 연결을 검토하였고, 0.25${\mu}m$ CMOS process에서 Memory MOS와 CMOS Switch의 Width의 관계는 simulation 결과를 통하여 확인하였으며, MOS transistor의 관계를 분명히 하여, 설게의 지침을 제공한다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.8
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• pp.42-45
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• 2002

A low power SDRAM output buffer with reduced power line noise and feedthrough current is presented. In multi I/O SDRAM output buffer, feedthrough current as well as the corresponding power dissipation are reduced utilizing proposed undershoot protection circuits. Ground bounce is minimized by the pull down driver using intelligent feedback scheme. Ground bounce noise is reduced by 66.3% and instantaneous and average power are reduced by 27.5% and 11.4%, respectively.

• Nuclear Engineering and Technology
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• v.34 no.3
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• pp.211-217
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• 2002

A 1-MW vacuum feedthrough for the KSTAR ICRF antenna is fabricated and high power RF test is performed. It is designed to have two alumina $(Al_2O_3)$ ceramic cylinders and O-ring seal instead of a brazed seal for good mechanical and thermal strength, which is important in long pulse or steady state operation. For cooling of the ceramics, dry air is circulated in a space between the two cylinders and the outer conductor. Independent cooling water channels are installed to cool the inner conductor of the feedthrough. RF high voltage test is performed using two kinds of ceramics with the purities of 99.7% and 97%. Stable operation is possible with the RF voltage of 30 kVp at long pulse of 300 sec without any severe damage.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2011.06a
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• pp.541-542
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• 2011

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.2
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• pp.159-164
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• 2016

A wireless communication system is required to be implemented with the low power circuits because it uses a battery having a limited energy. Therefore, the current mode circuit has been studied because it consumes constant power regardless of the frequency change. However, the clock-feedthrough problem is happened by leak of stored energy in memory operation. In this paper, we suggest the current memory circuit to minimize the clock-feedthrough problem and introduce a technique for ultra low power operation by inducing dynamic voltage scaling. The current memory circuit was designed with BSIM3 model of $0.35{\mu}m$ process and was operated in the near-threshold region. From the simulation result, the clock-feedthrough could be minimized when designing the memory MOS Width of $2{\mu}m$, the switch MOS Width of $0.3{\mu}m$ and dummy MOS Width of $13{\mu}m$ in 1MHz switching operation. The power consumption was calculated with $3.7{\mu}W$ at the supply voltage of 1.2 V, near-threshold voltage.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.05a
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• pp.475-476
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• 2010

• The Journal of the Korea institute of electronic communication sciences
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• v.3 no.2
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• pp.79-85
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• 2008

It is important to consider the life of battery and low power operation for various wireless communications. Thus, Analog current-mode signal processing with SI circuit has been taken notice of in designing the LSI for wireless communications. However, in current mode signal processsing, current memory circuit has a problem called clock-feedthrough. In this paper, we examine the connection of CMOS switch that is the common solution of clock-feedthrough and calculate the relation of width between CMOS switch for design methodology for improvement of current memory. As a result of simulation, when the width of memory MOS is 20um, ratio of input current and bias current is 0.3, the width relation in CMOS switch is obtained with $W_{Mp}=5.62W_{Mn}+1.6$, for the nMOS width of 2~6um in CMOS switch. And from the same simulation condition, it is obtained with $W_{Mp}=2.05W_{Mn}+23$ for the nMOS width of 6~10um in CMOS switch. Then the defined width relation of MOS transistor will be useful guidance in design for improvement of current memory.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2007.04a
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• pp.485-488
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• 2007

최근 Analog Sampled-Data 신호처리를 위하여 주목되고 있는 SI(Switched-Current) circuit은 저전력 동작을 하는 장점이 있지만, 반면에 SI circuit에서의 기본 회로인 Current Memory는 Charge Injection에 의한 Clock Feedthrough이라는 치명적인 단점을 갖고 있다. 따라서 본 논문에서는 Current Memory의 문제점인 Clock Feedthrough의 일반적인 해결방안으로 Dummy Switch의 연결을 검토하였고, Austria Mikro Systeme(AMS)에서 $0.35{\mu}m$ CMOS process BSIM3 Model로 제작하기 위하여 Current Memory의 Switch MOS와 Dummy Switch MOS의 적절한 Width을 정의하여야 하므로, 그 값을 도출하였다. Simulation 결과, Switch의 Width는 $2{\mu}m$, Dummy Switch의 Width는 $2.35{\mu}m$로 정의될 수 있음을 확인하였다.