• 제목/요약/키워드: Feedback circuit

검색결과 493건 처리시간 0.033초

PLL Synthesizer를 이용한 새로운 FM 회로 설계 및 제작 (Design and Implementation of a Novel Frequency Modulation Circuit using Phase Locked Synthesizer)

  • 양승식;이종환;염경환
    • 한국전자파학회:학술대회논문집
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    • 한국전자파학회 2003년도 종합학술발표회 논문집 Vol.13 No.1
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    • pp.224-228
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    • 2003
  • In this paper, for phase lock loop(PLL) synthesizer, we introduce a novel but simple and low cost frequency modulation(FM) circuit of a flat peak frequency deviation for modulation signal from high to very low frequency penetrating into the loop-bandwidth of PLL. The FM circuit was basically designed to compensate an amount of feedback of the loop filter in PLL. The circuit also includes the capability of the adjustment of peak frequency deviation and blocking the interference with the loop filter. The designed circuit was successfully implemented and showed the flat frequency deviation as expected in the design.

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고장 검풀이 용이한 Zipper CMOS 회로의 설계 (Testable Design for Zipper CMOS Circuits)

  • ;임인칠
    • 대한전자공학회논문지
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    • 제24권3호
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    • pp.517-526
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    • 1987
  • This paper proposes a new testable design for Zipper CMOS circuits. This design provides an additional feedback loop (called self oscillation loop) whichin the circuit, for testability. The circuit is tested only by observing the oscillation on the loop. The design can be applied to the multistage as well as the single stage, and can detect multiple faults which are undetectable by the conventional testing method. The application and evaluation of test patterns become easy and fault-free responses are not necessary. If the conventional testing method is applied to the sequential Zipper CMOS circuit with the LSSD design technique, it has the serious defect that the initial value may change due to intermediate test patterns and much time taken to apply the necessary test patterns. By using the proposed design, however, the sequential Zipper CMOS circuit with the LSSD design technique can be easily tested without such a defect. Also, the validity of the design is verified by performing the circuit level simulation.

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Integrate-and-Fire Neuron Circuit and Synaptic Device with Floating Body MOSFETs

  • Kwon, Min-Woo;Kim, Hyungjin;Park, Jungjin;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권6호
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    • pp.755-759
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    • 2014
  • We propose an integrate-and-fire neuron circuit and synaptic devices with the floating body MOSFETs. The synaptic devices consist of a floating body MOSFET to imitate biological synaptic characteristics. The synaptic learning is performed by hole accumulation. The synaptic device has short-term and long-term memory in a single silicon device. I&F neuron circuit emulate the biological neuron characteristics such as integration, threshold triggering, output generation, and refractory period, using floating body MOSFET. The neuron circuit sends feedback signal to the synaptic transistor for long-term memory.

스위칭 레귤레이터의 안전성과 이득대역폭적과의 관계 (The Relationship Between Stability and Gain Band-width Product in the Switching Regulator)

  • 김희준;이인환
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1988년도 추계학술대회 논문집 학회본부
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    • pp.399-402
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    • 1988
  • In this paper, the relationship between stability and gain band-width product (GB) is clear ed by evaluating the feedback gain in the buck-boost switching regulator. Especially, considering the effect of the right-half-plane pole on the stability, we found available region of GB on the stability with the one pole compensation for the feedback circuit.

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Integrated driver with optical compensation for improved uniformity of emissive displays

  • Maeyaert, Stefaan;Bakeroot, Benoit;Doutreloigne, Jan;Monte, Ann;Bauwens, Pieter;Calster, Andre Van
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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    • pp.692-695
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    • 2008
  • Large area emissive displays have problems with nonuniform pixel characteristics and their individual ageing. A pixel integrated driver with pixel based optical feedback is presented to solve these problems. Photodetectors, optical feedback circuit and data handling capabilities are integrated in a high voltage CMOS technology.

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벅형 프리레귤레이터를 가진 일정주파수 직렬공진변환기를 위한 새로운 준최적제어기 설계 (A sub-optimal controller design for constant-frequency series resonant converter with buck type pre-regulator)

  • 안희욱;고정호;윤명중
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1990년도 한국자동제어학술회의논문집(국내학술편); KOEX, Seoul; 26-27 Oct. 1990
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    • pp.96-100
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    • 1990
  • Dynamic modelling and controller design technique for constant-frequency series resonant converter with buck type preregulator are mainly described in this paper. An equivalent circuit model is derived and a state equation is developed from this model. To improve the dynamic performance, a negative feedback of inductor current is added to the proportional and integral control of output voltage. Furthermore, an optimization technique with prescribed eigenvalue region is applied to the determination of feedback gains. With the presented design method, much better dynamic performance can be obtained.

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구조 진동을 고려한 평판 구조물 음향 투과 특성 연구 (Study on Sound Transmission through a Panel including Structural Vibration)

  • 장우석;김원철
    • 한국소음진동공학회:학술대회논문집
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    • 한국소음진동공학회 2011년도 추계학술대회 논문집
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    • pp.811-816
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    • 2011
  • This study includes investigation on sound transmission phenomena through a structural panel including structural vibration and feedback control methodology to minimize the transmission. Focus is placed on finding the relation between vibration pattern and sound transmission, and on finding optimal sensor and actuator location. A simple analog feedback control circuit is designed and implemented to verify the approach.

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직렬 피드백 기법을 이용한 저잡음 증폭기의 구현에 관한 연구 (A Study on the Fabrication of the Low Noise Amplifier Using a Series Feedback Method)

  • 김동일;유치환;전중성;정세모
    • 한국항해학회지
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    • 제25권1호
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    • pp.53-60
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    • 2001
  • 본 논문에서는 IMT-2000 수신주파수인 2.13~2.16 GHz 대역에서 초고주파용 수신장치로 사용되는 저잡음증폭기를 ㅈㄱ렬 피드백 기법과 저항결합회로를 이용하여 구현하였다. GaAs FET(Field Effect Transistor)의 소스단에 부가한 직렬 피드백은 저잡음증폭기의 저잡음특성과 입력반사계수가 작아졌으며, 또 저잡음증폭기의 안정도도 개선되었다. 저항결합회로는 반사되는 전력이 정합 회로내의 저항에서 소모되므로 입력단정합이 용이하였다. 저잡음증폭기의 저잡음증폭단은 GaAs FET인 ATF-10136, 고득증폭단은 내부정합된 MMIC인 VNA-25를 사용하였으며, 알루미늄 기구물 안에 유전율 3.5인테프론 기판에 초고주파회로와 자기바이어스 회로를 함께 장착시켰다. 이렇게 제작된 저잡음증폭기는 30 dB이상의 이득, 0.7dB 이하의 잡음지수, 17 dB의 Pldb, 1.5 이하의 입출력 정재파비를 얻었다.

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무선 광통신에서 광전 궤환을 이용한 잡음 광의 영향 감소 (Reducing the Effects of Noise Light in an Wireless Optical Communication Using Optoelectronic Feedback)

  • 황다현;이성호
    • 한국전자파학회논문지
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    • 제21권10호
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    • pp.1136-1142
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    • 2010
  • 본 논문에서는 조명용 LED를 광원으로 사용한 무선 광통신 시스템에서 광전 궤환을 이용한 ASK 변조 방식을 사용하여 잡음 광의 간섭을 소거하였다. 광전 궤환 회로의 발진을 이용하여 70 kHz의 반송파를 자체적으로 생성하였으며, 입력 신호를 사용하여 궤환 회로의 단락과 개방을 반복함으로써 9.6 kbps의 데이터 속도로 출력광을 ASK 변조하였다. 주변의 잡음 광이 존재하는 환경에서 광전 궤환을 이용한 ASK 변조 방식을 사용함으로써 신호대 잡음비가 약 25 dB 개선되었다.

Integrated Current-Mode DC-DC Buck Converter with Low-Power Control Circuit

  • Jeong, Hye-Im;Lee, Chan-Soo;Kim, Nam-Soo
    • Transactions on Electrical and Electronic Materials
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    • 제14권5호
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    • pp.235-241
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    • 2013
  • A low power CMOS control circuit is applied in an integrated DC-DC buck converter. The integrated converter is composed of a feedback control circuit and power block with 0.35 ${\mu}m$ CMOS process. A current-sensing circuit is integrated with the sense-FET method in the control circuit. In the current-sensing circuit, a current-mirror is used for a voltage follower in order to reduce power consumption with a smaller chip-size. The N-channel MOS acts as a switching device in the current-sensing circuit where the sensing FET is in parallel with the power MOSFET. The amplifier and comparator are designed to obtain a high gain and a fast transient time. The converter offers well-controlled output and accurately sensed inductor current. Simulation work shows that the current-sensing circuit is operated with an accuracy of higher than 90% and the transient time of the error amplifier is controlled within $75{\mu}sec$. The sensing current is in the range of a few hundred ${\mu}A$ at a frequency of 0.6~2 MHz and an input voltage of 3~5 V. The output voltage is obtained as expected with the ripple ratio within 1%.