• Title/Summary/Keyword: Fault-Tolerant System

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Design of the Reconfigurable Load Distribution Control Allocator

  • Yang, Inseok;Kang, Myungsoo;Sung, Jaemin;Kim, Chong-Sup;Cho, Inje
    • International Journal of Aerospace System Engineering
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    • v.4 no.1
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    • pp.1-8
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    • 2017
  • This paper proposes the load distribution control allocation technique. The proposed method is designed by combining a conventional control allocation method with load distribution ability in order to reduce the stress acting on ailerons. By designing the weighting matrix as a function of the load distribution rule, the optimal deflection angles of each surface to satisfy both control goal and load distribution can be achieved. Moreover, rule based fault-tolerant control technique is also proposed. The rules are generated by considering both dominant control surfaces and the ratio of load distribution among surfaces. The performance of the proposed method is evaluated through numerical simulations.

Design and Implementation of On-board Computers for KAISTSAT-4 (과학위성 1호 탑재 컴퓨터의 설계 및 구현)

  • 곽성우;류상문;박홍영;오대수;유관호;최병재;김병국
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.31 no.4
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    • pp.105-111
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    • 2003
  • Qualification Model of On-board Computer (OBC) for KAISTSAT-4 was developed. The OBC of KAISTASAT-4 has some improved features compared with that of KAISTSAT-3: To reduce weight and size of OBC many logics are implemented by FPGAs, and a network controller is included in OBC to access the satellite network with high speed. Also, the developed OBC has an improved tolerance against SEUs and faults. The OBC was fully tested under simulated space environment with no errors.

Fault-Tolerant Algorithm using Multi-Connectivity of Communication Networks (통신망의 다중연결성을 이용한 결함허용 알고리즘)

  • Moon, Yun-Ho;Kim, Byung-Ki
    • Journal of KIISE:Computer Systems and Theory
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    • v.27 no.1
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    • pp.53-60
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    • 2000
  • The purpose of this paper is to propose new recovery algorithm for case of a system element raises communication obstacle due to faults in networks, Also we are simulate the algorithm using adjacency matrix. We recover one faulty node per each excution of proposed algorithm so that we can be reconstruct the faulty system gradually to communicatable network. For that, this paper propose a new recovery algorithm named MATRECO which connect the recovery process is simulated by use of adjacency matrix.

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Investigation of Winding Connections for Fault-Tolerant of MW Class Offshore Wind Generator with Dual 3-Phase System and Modular (이중 3상 시스템과 모듈러를 갖는 MW급 해상용 풍력발전기의 무정지 기능을 위한 권선 체결방식에 관한 연구)

  • Seo, Jang Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.8
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    • pp.1108-1114
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    • 2013
  • This paper presents a new winding topology for MW class offshore wind generator having modular and dual 3-phase. Based on proposed simplified relationship between magnetic flux and phase current in the air gap, several new windings for modular and dual 3-phase are made. In case of one inverter operation or faulty operation, the proposed model can have balanced 3-phase induced voltage whereas the conventional generator with modular winding has unbalanced induced voltage, which can be important issue in offshore generator. The model was applied into 6MW prototype machine with dual 3-phase. Using finite element analysis, induced voltage, inductance were investigated. The results show that the proposed modular winding can be applicable to dual inverter system with electrically balanced voltage.

Design of Fault tolerant controller for electromagentic suspenstion system (자기부상 시스템에서의 내 고장성 제어기 설계)

  • Jang, Seok-Myeong;Sung, So-Young;Kim, In-Kun;Sung, Ho-Kyung
    • Proceedings of the KIEE Conference
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    • 1999.11b
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    • pp.70-72
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    • 1999
  • Actuator (chopper) and sensors failures resulting from electric shock and mechanical vibration generating by rail irregularities are the serious problem deteriorating the performance in the electromagnetic suspension systems. Thus, this paper proposes the reliable output feedback controller for the electromagnetic levitation systems against actuator, air-gap sensor and acceleration sensor failures. The designed controller is an extend version of a novel design technique which has the design method of the output feedback controller using dynamic compensator. The benefits of this scheme are demonstrated through the experimental results for the proposed controller against chopper, air-gap sensor and acceleration sensor failures of electromagnetic levitation system.

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Design of Fault Tolerant Controller for Electromagnetic Supension System (자기부상시스템에서의 내고장성 제어기 설계)

  • Seong, Ho-Gyeong;Jo, Heung-Jae;Jeong, Seok-Yeong;Seong, So-Yeong
    • 연구논문집
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    • s.30
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    • pp.79-92
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    • 2000
  • Chopper and sensors failures resulting from electric shock and mechanical vibration generated by rail irregularities are the serious problem deteriorating the performance in the electromagnetic suspension systems. Thus, this paper proposes a reliable output feedback control scheme for the electromagnetic suspension systems in the present of chopper, gap sensor and acceleration sensor failures. The designed controller is an extended version of a novel design technique which has the design method of the output feedback controller using dynamic compensator. The benefits of this scheme are demonstrated through the simulation and experimental results for proposed controller against chopper, gap sensor and acceleration sensor failures of electromagnetic suspension system.

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DESIGN AND IMPLEMENTATION OF ON-BOARD COMPUTERS FOR STSAT-2

  • Ryu Changwan;Choi Myungjin;Oh Daesoo;Kang Kyungin;Nam Myeong-Ryong;Keum Junghoon
    • Bulletin of the Korean Space Science Society
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    • 2004.10b
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    • pp.293-295
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    • 2004
  • The Engineering Model of on-board computer was developed and tested completely with other sub-systems for STSAT-2. We designed the on-board computer of STSAT-2 which has some improved features compared with that of STSAT-l. A remarkable change is that the on-board computer has a structure of centeralized network communication without a Network Controller of the STSAT-l. That is, the on-board computer directly manages a satellite network. In addition, as many logics are implemented by Field Programmable Gate Array, so we can reduce the weight and size of on-board computer. Also, the developed on-board computer has more improved tolerance against Single Event Upsets and faults than that of the STSAT-l.

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Implementation and Performance Analysis of Group Communication using the CORBA & JAVA (CORBA와 JAVA를 이용한 그룹통신 구현 및 성능 분석)

  • Choe, Man-Eok;Gu, Yong-Wan
    • The KIPS Transactions:PartA
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    • v.8A no.4
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    • pp.461-468
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    • 2001
  • Large-scale distributed applications based on Internet and client/server applications have to deal with series of problems such as load balancing, unpredictable communication delays, partial errors, and networking failures. Therefore, sophisticated applications such as teleconferencing, video-on-demand, and concurrent software engineering require an abstracted communication. In this paper, we present our design, implementation and performance analysis of group communication using the CORBA ORB, JAVA RMI, Socket based on distributed computing. We anticipate our study may apply to the various field of applications such as fault-tolerant client/server system, groupware, scalable text retrieval system, and financial information systems.

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Research about Fault Tolerant system for ensuring the Reliability of computer system (컴퓨터 시스템의 신뢰성 확보를 위한 고장 감내 시스템 연구)

  • 김대원;박호림;오병균
    • Proceedings of the Korea Multimedia Society Conference
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    • 2003.05b
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    • pp.19-22
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    • 2003
  • 현대 사회는 인터넷과 네트워크의 발전과 더불어 많은 성장을 거듭해 왔고, 인터넷을 이용한 많은 서비스들은 계속해서 생기고 있다. 이러한 사회적인 배경에서 인터넷을 이용한 서비스에 대한 의존도도 또한 급격하게 증가하고 있다. 서비스를 언제, 어디서나 접근이 가능하게 함으로써 사용자들이 편리한 서비스를 제공받을 수 있게 되었지만, 이러한 서비스들이 안정적으로 제공되어야 한다. 고로 본 논문에서는 컴퓨터 시스템에 대한 신뢰성을 확보하기 위해 사용되는 기법 중 소프트웨어적인 고장 감내 시스템에 대해 알아보고 그에 따른 기법들을 조사하여 단일 시스템에서 구현해 볼 수 있는 방법 중 감시 프로세스를 이용하여 서비스를 안정적으로 서비스를 할 수 있는지에 대해 알아보았다.

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Fault Tolerant Cache for Soft Error (소프트에러 결함 허용 캐쉬)

  • Lee, Jong-Ho;Cho, Jun-Dong;Pyo, Jung-Yul;Park, Gi-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.1
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    • pp.128-136
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    • 2008
  • In this paper, we propose a new cache structure for effective error correction of soft error. We added check bit and SEEB(soft error evaluation block) to evaluate the status of cache line. The SEEB stores result of parity check into the two-bit shit register and set the check bit to '1' when parity check fails twice in the same cache line. In this case the line where parity check fails twice is treated as a vulnerable to soft error. When the data is filled into the cache, the new replacement algorithm is suggested that it can only use the valid block determined by SEEB. This structure prohibits the vulnerable line from being used and contributes to efficient use of cache by the reuse of line where parity check fails only once can be reused. We tried to minimize the side effect of the proposed cache and the experimental results, using SPEC2000 benchmark, showed 3% degradation in hit rate, 15% timing overhead because of parity logic and 2.7% area overhead. But it can be considered as trivial for SEEB because almost tolerant design inevitably adopt this parity method even if there are some overhead. And if only parity logic is used then it can have $5%{\sim}10%$ advantage than ECC logic. By using this proposed cache, the system will be protected from the threat of soft error in cache and the hit rate can be maintained to the level without soft error in the cache.