• Proceedings of the KSR Conference
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• 2009.05b
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• pp.623-628
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• 2009

There is an increasing demand for efficient high power/weight auxiliary power supplies for use on high speed traction application. Many new conversion techniques have been proposed to reduce the voltage and current stress of switching components, and the switching losses in the traditional pulse width modulation(PWM) converter. Especially, the phase shift full bridge zero voltage switching PWM techniques are thought most desirable for many applications because this topology permits all switching devices to operate under zero voltage switching(ZVS) by using circuit parasitic components such as leakage inductance of high frequency transformer and power device junction capacitance. The proposed topology is found to have higher efficiency than conventional soft-switching converter. Also it is easily applicable to phase shift full bridge converter by applying an energy recovery snubber consisted of fast recovery diodes and capacitors.

• Proceedings of the KSR Conference
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• 2008.11b
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• pp.321-324
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• 2008

Recently, there is an increasing demand for efficient high power/weight auxiliary power supplies for use on high speed traction application. many new conversion techniques have been proposed to reduce the voltage and current stress of switching components, and the switching losses in the traditional pulse width modulation(PWM) converter. Among them, the phase shift full bridge zero voltage switching PWM techniques are thought most desirable for many applications because this topology permits all switching devices to operate under zero voltage switching(ZVS) by using circuit parasitic components such as leakage inductance of high frequency transformer and power device junction capacitance. The proposed topology is found to have higher efficiency than conventional soft-switching converter. Also it is easily applicable to phase shift full bridge converter by applying an energy recovery snubber consisted of fast recovery diodes and capacitors.

• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.3129-3131
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• 1999

The electronic ballast for MHD lamp was studied for automotive headlight application. Its basic principle is the Current Sourcing Push-Pull Resonant Inverter with DC I2Volt input Voltage. By changing the switching frequency according to the lamp state, the automotive requirement of very fast warm-up and the zero voltage switching condition were shown by the simulation of the ballast circuit.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.4
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• pp.368-376
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• 2012

According to developed distributed generators, Solid State Circuit Breaker(SSCB) is essential for high power quality of DC Grid. In this paper, a simple and new structure of DC SSCB with a fast circuit breaker and fault current limiter is proposed. It can help to choice low specification of elements because of the limiting of fault current and achieve economic efficiency for minimizing auxiliary SCRs. Also all of SCRs have little switching loss because they operate under ZVS and ZCS. Through simulations and experiments of short-circuit fault, the performance characteristic of proposed circuit is verified and a guideline is so suggested that the DC SSCB is applied for a different DC grid using formulas.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.5
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• pp.761-769
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• 1994

VCB (Vacuum Circuit Breaker), with the strong arc extinction capability in switching the source of an induction motor, occurs the severe switching surge voltage which can cause the breakdown or the deterioration of motor insulation. Therefore, a method which reduces surge voltage across motor windings is necessary. So, it is analyzed that fast-rise-time surges resulting from VCB switching operations give rise to severe voltage stress on turn insulation. Additionally, the switching surge simulation algorithms using EMTP are developed, and C, R values of surge suppressor minimizing the steep-fronted stress in winding insulation surges are calculated.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.23-32
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• 2006

Fast and accurate power bus design (FAPUD) method for multi-layers high-speed digital boards is devised for the power supply network design tool for accurate and precise high speed board. FAPUD is constructed, based on two main algorithms of the PBEC (Path Based Equivalent Circuit) model and the network synthesis method. The PBEC model exploits simple arithmetic expressions of the lumped 1-D circuit model from the electrical parameters of a 2-D power distribution network. The circuit level design based on PBEC is carried with the proposed regional approach. The circuit level design directly calculates and determines the size of on-chip decoupling capacitors, the size and the location of off-chip decoupling capacitors, and the effective inductances of the package power bus. As a design output, a lumped circuit model and a pre-layout of the power bus including a whole decoupling capacitors are obtained after processing FAPUD. In the tuning procedure, the board re-optimization considering simultaneous switching noise (SSN) added by I/O switching can be carried out because the I/O switching effect on a power supply noise can be estimated over the operation frequency range with the lumped circuit model. Furthermore, if a design changes or needs to be tuned, FAPUD can modify design by replacing decoupling capacitors without consuming other design resources. Finally, FAPUD is accurate compared with conventional PEEC-based design tools, and its design time is 10 times faster than that of conventional PEEC-based design tools.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.5
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• pp.389-396
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• 2003

This paper describes a novel ac/dc power converter suitable for frequent output short-circuit faults. The output dc power of the proposed converter can be disconnected from the load within several hundred microseconds at the instant of short-circuit fault. The rising time of the dc load voltage is as small as several hundred microseconds, and there Is no overshoot of the dc voltage because the dc output fillet capacitors stay at a undischarged state. The proposed converter has the characteristics of a simplified structure, reduced cost, weight, and volume compared to the conventional power supplies for frequent output short-circuit. Analysis, simulations, and experiments are carried out to investigate the operation and usefulness of the proposed scheme.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.53 no.5
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• pp.351-357
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• 2004

In this paper, we present an analytical method that provides fast and efficient evaluation of the conversion efficiency for switching power supplies. In the proposed method, the conduction losses are evaluated by calculating the effective values of the ideal current waveform first and incorporating them into an exact equivalent circuit model of the switching power supply that includes all the parasitic resistances of the circuit components. While the winding losses and core losses are accurately accounted for the magnetic components, the skin and proximity effects are assumed to be negligible in order to simplify the analysis. The validity and accuracy of the proposed method are verified with experiments on a prototype active-clamped forward converter with synchronous rectification. An excellent correlation between the experiments and theories are obtained for the input voltages of 36-75 V with 4-6 MOSFETs employed for the synchronous rectification.

• Journal of Power Electronics
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• v.18 no.4
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• pp.1255-1267
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• 2018

Parasitic parameters have a larger influence on Silicon Carbide (SiC) devices with an increase of the switching frequency. This limits full utilization of the performance advantages of the low switching losses in high frequency applications. By combining a theoretical analysis with a experimental parametric study, a mathematic model considering the parasitic inductance and parasitic capacitance is developed for the basic switching circuit of a SiC MOSFET. The main factors affecting the switching characteristics are explored. Moreover, a fast-switching double pulse test platform is built to measure the individual influences of each parasitic parameters on the switching characteristics. In addition, guidelines are revealed through experimental results. Due to the limits of the practical layout in the high-speed switching circuits of SiC devices, the matching relations are developed and an optimized layout design method for the parasitic inductance is proposed under a constant length of the switching loop. The design criteria are concluded based on the impact of the parasitic parameters. This provides guidelines for layout design considerations of SiC-based high-speed switching circuits.

• Journal of Power Electronics
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• v.17 no.3
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• pp.601-609
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• 2017

Gallium nitride (GaN) power switching devices are promising candidates for high switching frequency and high efficiency power conversion due to their fast switching, low on-state resistance, and high-temperature operation capability. In order to facilitate the use of these new devices better, it is required to investigate the device characteristics and performance in detail preferably by comparing with various conventional silicon (Si) devices. This paper presents a comprehensive study of GaN high electron mobility transistor (HEMT) based non-isolated point-of-load (POL) synchronous buck converter operating at 2.7 MHz with a high step-down ratio (24 V to 3.3 V). The characteristics and performance of GaN HEMT and three different Si devices are analytically investigated and the optimal operating point for GaN HEMT is discussed. Zero-voltage switching (ZVS) is implemented to minimize switching loss in high switching frequency operation. The prototype circuit and experimental data support the validity of analytical and simulation results.