• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.6
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• pp.569-575
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• 2003

This paper present a new fully-automated PC-based instrumental system that could quickly measure and analyze the efficiency of switching power supplies for the entire operating range. In the proposed system, we applied an Indirect method for high-voltage low-current measurements and a direct method for low-voltage high-current measurements, in order to obtain a high accuracy with minimum equipment requirement. Compared to the conventional methods, the newly proposed system offers more accurate and much faster real-time assessment of the efficiency with minimum measurement error. The performance and accuracy of the proposed system are verified using a 50 W switching power supply intended for telecommunication applications.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.1
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• pp.48-54
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• 2017

In this paper, hysteresis voltage control method is proposed to an unidirectional inverter control for piezoelectric load. Piezoelectric load has electrically RC characteristic, and is driven by the inverter to control the output voltage waveform. When controling the output waveform by PI control, appropriate gains need to be selected. However, hysteresis control may minimize the output distortion because it has maximum proportional gain. In addition, Hysteresis control algorithm has simple structure to realize and the response is fast. Although the switching frequency of the inverter by hysteresis control varies, the switching frequency for the piezoelectric load is lower than that by PI control for equivalent performance. In particular, on implementing the algorithm using FPGA, the algorithm can be implemented in fewer pabrics and the processing time can be reduced. The superiority of the proposed hysteresis voltage control was proved for piezoelectric load through simulation and experiment.

• Journal of Power Electronics
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• v.7 no.2
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• pp.146-158
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• 2007

A multi-pulse GTO based voltage source converter (VSC) topology together with a fundamental frequency switching mode of gate control is a mature technology being widely used in static synchronous compensators (STATCOMs). The present practice in utility/industry is to employ a high number of pulses in the STATCOM, preferably a 48-pulse along with matching components of magnetics for dynamic reactive power compensation, voltage regulation, etc. in electrical networks. With an increase in the pulse order, need of power electronic devices and inter-facing magnetic apparatus increases multi-fold to achieve a desired operating performance. In this paper, a competitive topology with a fewer number of devices and reduced magnetics is evolved to develop an 18-pulse, 2-level $\pm$ 100MVAR STATCOM in which a GTO-VSC device is operated at fundamental frequency switching gate control. The inter-facing magnetics topology is conceptualized in two stages and with this harmonics distortion in the network is minimized to permissible IEEE-519 standard limits. This compensator is modeled, designed and simulated by a SimPowerSystems tool box in MATLAB platform and is tested for voltage regulation and power factor correction in power systems. The operating characteristics corresponding to steady state and dynamic operating conditions show an acceptable performance.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.04a
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• pp.89-90
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• 2006

Electro-optical (EO) characteristics of in-plane switching (IPS) cell on the polyimide surface using obliquely ion beam (IB) exposure as new ion beam (IB) type system (DuoPIGatrion ion source). A good uniform alignment of the nematic liquid crystal (NLC) alignment with the ion beam exposure on the polyimide surface was observed. In addition, it can be achieved the good EO properties of the ion-beam-aligned IPS-cell on poly imide surface ; the stable VT curve in the ion-beam-aligned IPS cell on a poly imide (PI) surface with ion beam exposure using new type IB equipment was obtained. and the fast response time in the ion-beam-aligned IPS cell on a polyimide (PI) surface with ion beam exposure using new type IB equipment was obtained.

• Journal of Power Electronics
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• v.19 no.1
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• pp.307-315
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• 2019

Condition monitoring has been recognized as an effective and low-cost method to enhance the reliability and improve the maintainability of power electronic converters. In power electronic converters, high-frequency oscillation occurs during the switching transients of power transistors, which is known as ringing. The ringing frequency mainly depends on the values of the parasitic capacitance and stray inductance in the oscillation loop. Although circuit stray inductance is an important factor that leads to the ringing, it does not change with transistor aging. A shift in either the inside inductance or junction capacitance is an important failure precursor for power transistors. Therefore, ringing frequency can be used to monitor the health of power transistors. However, the switching actions of power transistors usually result in a dynamic behavior that can generate oscillation signals mixed with background noise, which makes it hard to directly extract the ringing frequency. A frequency extraction method based on empirical mode decomposition (EMD) and Fast Fourier transformation (FFT) is proposed in this paper. The proposed method is simple and has a high precision. Simulation results are given to verify the ringing analysis and experimental results are given to verify the effectiveness of the proposed method.

• The KIPS Transactions:PartC
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• v.10C no.2
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• pp.155-162
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• 2003

Fast restoration time and service guarantee are the important goals to achieve the network reliability. In the protection switching scheme, one way to guarantee service fro an application session if a network happens to fail is to establish the restoration path that amounts to the same bandwidth of the working path of the session at the same time. When we setup the restoration path, we can reduce the bandwidth consumption by the restoration path if the path can share the bandwidth required by the other paths. This paper explains the methods how to determine the shared bandwidth of the restoration path in the protection switching scheme, given the maximum bandwidth assigned to a link along the working path. We point out that such sharing algorithm can not reduce the bandwidth consumption by the restoration paths in some cases, which contradict the general conception. We explain why this can happen, and show the simulation results in real network topologies to prove our arguments. We explain the reason of the failure of the sharing effect by the simple sharing algorithm. Finally we propose the way of how we can overcome the failure of the sharing effect, using the complete sharing algorithm based on the link database and showing the results.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.7
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• pp.7-15
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• 2002

The digital DBS tuner is designed and implemented in a CMOS process using a direct-conversion architecture that offers a high degree of integration. To generate mathched LO I/Q quadrature signals covering the total input frequency range, a fully integrated ring oscillator is employed. And, to decrease a high level of phase noise of the ring oscillator, a frequency synthesizer is designed using a double loop strucure. This paper proposes and verifies a band selective loop for fast frequency switching time of the double loop frequency synthesizer. The down-conversion mixer with source follower input stages is used for low voltage operation. An experiment implementation of the frequency synthesizer and mixer with integrated a 0.25um CMOS process achieves a switching time of 600us when frequency changes from 950 to 2150MHz. And, the experiment results show a quadrature amplitude mismatch of max. 0.06dB and a quadrature phase mismathc of max. >$3.4^{\circ}$.

• The KIPS Transactions:PartA
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• v.8A no.3
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• pp.279-286
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• 2001

This paper proposes a low power resource allocation and scheduling algorithm that minimized power consumption such as DSP circuit in high-level synthesis process. In this paper, we have used list-scheduling method for low power design in scheduling step. Also, it increase possibility to reuse input through resource sharing when assign resource. After scheduling, the resources allocation uses the power function in consideration of the result of calculating average hamming distances and switching activity between two input. First, it obtain switching activity about input value after calculate average hamming distances between two operator and find power value make use of bit pattern of the input value. Resource allocation process assign operator to minimize average hamming distance and power dissipation on all occasions which is allocated at each control step according to increase control step. As comparing the existed method, the execution time becomes fast according to number of operator and be most numberous control step. And in case of power that consume, there is decrease effect from 6% to 8% to be small.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.12C
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• pp.1256-1261
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• 2005

In this paper, we propose a low-power Booth multiplication which reduces the switching activities of partial products during multiplication process. Radix-4 Booth algorithm has a characteristic that produces the Booth encoded products with zero when input data have sequentially equal values (0 or 1). Therefore, partial products have higher chances of being zero when an input with a smaller effective dynamic range of two multiplication inputs is used as a multiplier data instead of a multiplicand. The proposed multiplier divides a multiplication expression into several multiplication expressions with smaller bits than those of an original input data, and each multiplication is computed independently for the Booth encoding. Finally, the results of each multiplication are added. This means that the proposed multiplier has a higher chance to have zero encoded products so that we can implement a low power multiplier with the smaller switching activity. Implementation results show the proposed multiplier can save maximally about $20\%$ power dissipation than a previous Booth multiplier.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.9
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• pp.1867-1879
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• 1997

DREAM-S is a distributed main-memory database system for the real-time processing of shared operational datra in ATM switching systems. DREAM-S has a client-server architecture in which only the server has the diskstorage, and provides the T-Tree index structure for efficient accesses to the data. We propose a recovery technique for the T-Tree index structre in DREAM-S. Although main-memory database system offer efficient access performance, the database int he main-memory may be broken when system failure such as database transaction failure or power failure occurs. Therfore, a recovery technique that recovers the database (including index structures) is essential for fault tolerant ATM switching systems. Proposed recovery technique relieves the bottleneck of the server processors disk operations by maintaining the T-Tree index structure only in the main-memory. In addition, fast recovery is guaranteed even in large number of client systems since the T-Tree index structure(s) in each system can be recovered cncurrently.