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New Motion Vector Prediction for Efficient H.264/AVC Full Pixel Motion Estimation (H.264/AVC의 효율적인 전 영역 움직임 추정을 위한 새로운 움직임 벡터 예측 방법 제안)

  • Choi, Jin-Ha;Lee, Won-Jae;Kim, Jae-Seok
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.44 no.3
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    • pp.70-79
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    • 2007
  • H.264/AVC has many repeated computation for motion estimation. Because of that, it takes much time to encode and it is very hard to implement into a real-time encoder. Many fast algorithms were proposed to reduce computation time but encoding quality couldn't be qualified. In this paper we proposed a new motion vector prediction method for efficient and fast full search H.264/AVC motion estimation. We proposed independent motion vector prediction and SAD share for motion estimation. Using our algorithm, motion estimation reduce calculation complexity 80% and less distortion of image (less PSNR drop) than previous full search scheme. We simulated our proposed method. Maximum Y PSNR drop is about 0.04 dB and average bit increasing is about 0.6%.

A Prediction Search Algorithm by using Temporal and Spatial Motion Information from the Previous Frame (이전 프레임의 시공간 모션 정보에 의한 예측 탐색 알고리즘)

  • Kwak, Sung-Keun;Wee, Young-Cheul;Kimn, Ha-Jine
    • Journal of the Korea Computer Graphics Society
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    • v.9 no.3
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    • pp.23-29
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    • 2003
  • There is the temporal correlation of the video sequence between the motion vector of current block and the motion vector of the previous block. If we can obtain useful and enough information from the motion vector of the same coordinate block of the previous frame, the total number of search points used to find the motion vector of the current block may be reduced significantly. In this paper, we propose the block-matching motion estimation using an adaptive initial search point by the predicted motion information from the same block of the previous frame. And the first search point of the proposed algorithm is moved an initial point on the location of being possibility and the searching process after moving the first search point is processed according to the fast search pattern. Simulation results show that PSNR(Peak-to-Signal Noise Ratio) values are improved UP to the 1.05dB as depend on the image sequences and improved about 0.33~0.37dB on an average. Search times are reduced about 29~97% than the other fast search algorithms. Simulation results also show that the performance of the proposed scheme gives better subjective picture quality than the other fast search algorithms and is closer to that of the FS(Full Search) algorithm.

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A Fast Hierarchical Motion Vector Estimation Using Mean Pyramids (평균 피라미드를 이용한 계층적 고속 이동벡터 추정)

  • 남권문;김준식;박래홍;심영석
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.30B no.6
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    • pp.35-48
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    • 1993
  • In this paper, a hierarchical motion vector estimation algorithm using pyramidal structure is proposed. Using a smaller measurement window at each level of a pyramid than that of the conventional scheme, the proposed algorithm, based on the TSS(three step search), reduces the computational complexity greatly with its performance comparable to that of the TSS. By increasing the number of cnadidate motion vectors which are to be used as the initial search points for motion vector estimation at the next level, the performance improves further. Then the computational complexity of the proposed hierarchical algorithm depends on the number of candidate motion vectors, with its PSNR (peak signal to noise ratio) ranging between those of the TSS and the full search method. The simulation results with two different block sizes and various test sequences are given and its hardware implementation is also sketched.

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Low Computational Adaptive Expanded Block Search Motion Estimation Method (저연산 적응형 확장 블록 탐색 움직임 추정 기법)

  • Choi, Su-Woo;Yun, Jong-Ho;Cho, Tae-Kyung;Choi, Myung-Ryul
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.11 no.4
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    • pp.1254-1259
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    • 2010
  • In this paper, Low Computational Adaptive Expanded Block Search Motion Estimation Method is proposed. Proposed method classifies ME blocks as Average Motion Block(AMB) and Local Motion Block(LMB) according to correlation of reference frame. It could reduce the computational complexity with performing Modified Fast Search(MFS). And accuracy of MV is also increased by 4 sub-blocks on LMB and Block Expansion(BE). The experimental results show that the proposed method has better performance that increased 1.8dB than Diamond Search and 0.6dB than Full Search with 7.5 % computation of Full Search. The proposed method could be applied to video compression and Frame Rate Conversion(FRC).

A Fast and Low-complexity Motion Estimation for HEVC

  • Kim, Sungoh;Park, Chansik;Chun, Hyungju;Kim, Jaemoon
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2013.06a
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    • pp.173-175
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    • 2013
  • In this paper, we propose a fast and low-complexity Motion Estimation (ME) algorithm for High Efficiency Video Coding (HEVC). Motion estimation occupies 77~81% of the amount of computation in HEVC. After all, the main key of codec implementation is to find a fast and low-complexity motion estimation algorithm and architecture. The proposed algorithm uses only 1% of the amount of operations compared to full search algorithm while maintaining compression performance with slight loss of 0.6% (BDBR).

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Fast Digital Image Stabilization based on Edge Detection (경계 검출을 이용한 고속 디지털 영상 안정화 기법)

  • Kim, Jung-Hwan;Kim, Jin-Hyung;Byun, Keun-Yung;Ko, Sung-Jea
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.823-824
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    • 2008
  • In this paper, we propose a robust and fast digital image stabilization algorithm based on edge detection. The proposed algorithm exploits sobel operator to obtain edge image and fast detects irregular conditions with analyzing an edge information of the image. Experimental results show that the proposed algorithm can gain better performance in the sense of speed and precision comparing with full-block search method.

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A Low Dynamic Power 90-nm CMOS Motion Estimation Processor Implementing Dynamic Voltage and Frequency Scaling Scheme and Fast Motion Estimation Algorithm Called Adaptively Assigned Breaking-off Condition Search

  • Kobayashi, Nobuaki;Enomoto, Tadayoshi
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2009.01a
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    • pp.512-515
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    • 2009
  • A 90-nm CMOS motion estimation (ME) processor was developed by employing dynamic voltage and frequency scaling (DVFS) to greatly reduce the dynamic power. To make full use of the advantages of DVFS, a fast ME algorithm and a small on-chip DC/DC converter were also developed. The fast ME algorithm can adaptively predict the optimum supply voltage ($V_D$) and the optimum clock frequency ($f_c$) before each block matching process starts. Power dissipation of the ME processor, which contained an absolute difference accumulator as well as the on-chip DC/DC converter and DVFS controller, was reduced to $31.5{\mu}W$, which was only 2.8% that of a conventional ME processor.

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An Identification and Feature Search System for Scanned Comics (스캔 만화도서 식별 및 특징 검색 시스템)

  • Lee, Sang-Hoon;Choi, Nakyeon;Lee, Sanghoon
    • Journal of KIISE:Databases
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    • v.41 no.4
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    • pp.199-208
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    • 2014
  • In this paper, we represent a system of identification and feature search for scanned comics in consideration of their content characteristics. For creating the feature of the scanned comics, we utilize a method of hierarchical symmetry fingerprinting. Proposed identification and search system is designed to give online service provider, such as Webhard, an immediate identification result under conditions of huge volume of the scanned comics. In simulation part, we analyze the robustness of the identification of the fingerprint to image modification such as rotation and translation. Also, we represent a structure of database for fast matching in feature point database, and compare search performance between other existing searching methods such as full-search and most significant feature search.

Deinterlacing Method for improving Motion Estimator based on multi arithmetic Architecture (다중연산구조기반의 고밀도 성능향상을 위한 움직임추정의 디인터레이싱 방법)

  • Lee, Kang-Whan
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.44 no.1
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    • pp.49-55
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    • 2007
  • To improved the multi-resolution fast hierarchical motion estimation by using de-interlacing algorithm that is effective in term of both performance and VLSI implementation, is proposed so as to cover large search area field-based as well as frame based image processing in SoC design. In this paper, we have simulated a various picture mode M=2 or M=3. As a results, the proposed algorithm achieved the motion estimation performance PSNR compare with the full search block matching algorithm, the average performance degradation reached to -0.7dB, which did not affect on the subjective quality of reconstructed images at all. And acquiring the more desirable to adopt design SoC for the fast hierarchical motion estimation, we exploit foreground and background search algorithm (FBSA) base on the dual arithmetic processor element(DAPE). It is possible to estimate the large search area motion displacement using a half of number PE in general operation methods. And the proposed architecture of MHME improve the VLSI design hardware through the proposed FBSA structure with DAPE to remove the local memory. The proposed FBSA which use bit array processing in search area can improve structure as like multiple processor array unit(MPAU).

Fast Multi-Reference Frame Motion Estimation Algorithm Using a Relation of Motion Vector with Distance of Each Reference Frame (움직임 벡터와 참조 프레임간의 거리를 이용한 고속 다중 참조 프레임 움직임 추정)

  • Byun, Ju-Won;Choi, Jin-Ha;Kim, Jae-Seok
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.47 no.2
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    • pp.69-76
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    • 2010
  • This paper proposed a new fast multi-reference frame motion estimation algorithm. The proposed algorithm reduces search areas of motion estimation using a linear relation of motion vector with distance of each reference frame. New algorithm executes full search area motion estimation in reference frame 0 and reference frame 1. After that, search areas in reference frame 2, reference frame 3 and reference frame 4 are minimized by distance of each reference frame and results of motion estimation in reference frame 0 and reference frame 1. The proposed algorithm does not use a threshold value which is obstacle of hardware implementation and processing time schedule. Also, it reduced computation quantity of multi-reference motion estimation. Hardware implementation of multi-reference frame motion estimation is possible by these features. Simulation results show that PSNR drop and bitrate increase of proposed algorithm are lower than those of previous fast multi-reference frame motion estimation algorithm The number of computation of new algorithm is reduced 52.5% and quality of result is negligible when compared with full search area motion estimation which has 5 reference frames.