• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.44 no.2 s.314
• /
• pp.74-81
• /
• 2007

In this paper, an efficient SAD(Sum of Absolute Differences) processor structure for motion estimation of H.264 is proposed. SAD processors are commonly used both in full search methods for motion estimation and in fast search methods for motion estimation. Proposed structure consists of SAD calculator block, combinator block, and minimum value calculator block. Especially, proposed structure is simplified by using Distributed Arithmetic for addition operation. The Verilog-HDL(Hard Description Language) coding and FPGA(Field Programmable Gate Array) implementation results for the proposed structure show 39% and 32% gate count reduction in comparison with those of the conventional structure, respectively. Due to its efficient processing scheme, the proposed SAD processor structure can be widely used in size dominant H.264 chip.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.48 no.3
• /
• pp.106-111
• /
• 2011

This paper presents an ASIP (Application-specific Instruction Processor) for motion estimation that employs specific IME instructions and its programmable and reconfigurable hardware architecture for various video codecs, such as H.264/AVC, MPEG4, etc. With the proposed specific instructions and hardware accelerator, it can handle the real-time processing requirement of High Definition (HD) video. With the parallel operations and SAD unit control using pattern information, the proposed IME instruction supports not only full search algorithm but also other fast search algorithms. The hardware size is 77K gates for each Processing Element Group (PEG) which has 256 SAD PEs. The proposed ASIP runs at 160MHz with sixteen PEGs and it can handle 1080p@30 frame in real time.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.44 no.3
• /
• pp.23-32
• /
• 2007

The H.264/AVC video coding standard uses rate distortion optimization (RDO) method to improve the compression performance in the intra prediction. The complexity and computational load are increased more than previous standard by using this method, even though this standard selects the best coding mode for the current macroblock. This paper proposes a fast intra mode decision algorithm for H.264/AVC encoder based on dominant edge direction (DED). To apply the idea, this algorithm uses the approximation of discrete cosine transform (DCT) coefficient. By detecting the DED, 3 modes instead of 9 modes are chosen for RDO calculation to decide the best mode in the $4{\times}4$ luma block. As for the $16{\times}16$ luma and $8{\times}8$ chroma block, instead of 4 modes, only 2 modes are searched. Experimental results show that the computation time of the proposed algorithm is decreased to about 72% of the full search method with negligible quality loss.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.38 no.6
• /
• pp.692-702
• /
• 2001

In this paper, a new block-matching algorithm for standard video encoder is proposed. The algorithm finds a motion vector using the increasing SAD transition curve for each predefined candidates, not a coarse-to-fine approach as a conventional method. To remove low-probability candidates at the early stage of accumulation, a dispersed accumulation matrix is also proposed. This matrix guarantees high-linearity to the SAD transition curve. Therefore, base on this method, we present a new fast block-matching algorithm with the slice competition technique. The Candidate Selection Step and the Candidate Competition Step makes an out-performance model that considerably reduces computational power and not to be trapped into local minima. The computational power is reduced by 10%~70% than that of the conventional BMAs. Regarding computational time, an 18%~35% reduction was achieved by the proposed algorithm. Finally, the average MAD is always low in various bit-streams. The results were also very similar to the MAD of the full search block-matching algorithm.

• The KIPS Transactions:PartB
• /
• v.9B no.3
• /
• pp.359-368
• /
• 2002

In this paper, we propose effective boundary line extraction algorithm for moving objects by matching error image and moving vectors, and fast tracking algorithm for moving object by partial boundary lines. We extracted boundary line for moving object by generating seeds with probability distribution function based on Watershed algorithm, and by extracting boundary line for moving objects through extending seeds, and then by using moving vectors. We processed tracking algorithm for moving object by using a part of boundary lines as features. We set up a part of every-direction boundary line for moving object as the initial feature vectors for moving objects. Then, we tracked moving object within current frames by using feature vector for the previous frames. As the result of the simulation for tracking moving object on the real images, we found that tracking processing of the proposed algorithm was simple due to tracking boundary line only for moving object as a feature, in contrast to the traditional tracking algorithm for active contour line that have varying processing cost with the length of boundary line. The operations was reduced about 39% as contrasted with the full search BMA. Tracking error was less than 4 pixel when the feature vector was $(15\times{5)}$ through the information of every-direction boundary line. The proposed algorithm just needed 200 times of search operation.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.14 no.3
• /
• pp.1451-1458
• /
• 2013

This paper deals with the programs and algorithms that generate the full data set that satisfy the basic combinatorial requirement of combination, permutation, partial permutation or shortly r-permutation, which are used in the application of the total data testing or the simulation input. We search the programs able to meet the rules which is permutations and combinations, r-permutations, select the fastest program by field. With further study, we developed a new program reducing the time required to processing. Our research performs the following pre-study. Firstly, hundreds of algorithms and programs in the internet are collected and corrected to be executable. Secondly, we measure running time for all completed programs and select a few fast ones. Thirdly, the fast programs are analyzed in depth and its pseudo-code programs are provided. We succeeded in developing two programs that run faster. Firstly, the combination program can save the running time by removing recursive function and the r-permutation program become faster by combining the best combination program and the best permutation program. According to our performance test, the former and later program enhance the running speed by 22% to 34% and 62% to 226% respectively compared with the fastest collected program. The programs suggested in this study could apply to a particular cases easily based on Pseudo-code., Predicts the execution time spent on data processing, determine the validity of the processing, and also generates total data with minimum access programming.

• The Journal of the Acoustical Society of Korea
• /
• v.21 no.7
• /
• pp.648-655
• /
• 2002

This paper describes implementation of a multi-channel G.723.1 Annex A (G.723.1A) focused on code optimization using a high performance general purpose Digital Signal Processor (DSP), To implement a multi-channel G.723.1A functional complexities of the ITU-T G.723.1A fixed-point C-code are measures an analyzed. Then we sort and optimize C functions in complexity order. In parallel with optimization, we verify the bit-exactness of the optimized code using the ITU-T test vectors. Using only internal memory, the optimized code can perform full-duplex 17 channel processing. In addition, we further increase the number of available channels per DSP into 22 using fast codebook search algorithms, referred to as bit -compatible optimization.

• The KIPS Transactions:PartB
• /
• v.12B no.2 s.98
• /
• pp.131-136
• /
• 2005

Motion Estimation (ME) has been developed to remove redundant data contained in a sequence of image. And ME is an important part of video encoding systems, since it can significantly affect the qualify of an encoded sequences. Generally, ME consists of two stages, the integer pixel motion estimation and the half pixel motion estimation. Many methods have been developed to reduce the computational complexity at the integer pixel motion estimation. However, the studies are needed at the half pixel motion estimation to reduce the complexity. In this paper, a method based on the correlations between integer pixel motion vectors and half pixel motion vectors is proposed for the half pixel motion estimation. The proposed method has less computational complexity than the full half pixel search method (FHSM) that needs the bilinear interpolation of half pixels and examines nine half pixel points to the find the half pixel motion vector. Experimental results show that the speedup improvement of the proposed method over FHSM can be up to $2.5\~80$ times faster and the image quality degradation is about to $0.07\~0.69(dB)$.

• The KIPS Transactions:PartD
• /
• v.11D no.1
• /
• pp.11-22
• /
• 2004

As random access memory chip gets cheaper, it becomes affordable to realize main memory-based database systems. Consequently, reducing cache misses emerges as the most important issue in current main memory databases, in which CPU speeds have been increasing at 60% per year, compared to the memory speeds at 10% per you. In this paper, we design and implement a main-memory database system for real-time mobile GIS. Our system is composed of 5 modules： the interface manager provides the interface for PDA users； the memory data manager controls spatial and non-spatial data in main-memory using virtual memory techniques； the query manager processes spatial and non-spatial query : the index manager manages the MR-tree index for spatial data and the T-tree index for non-spatial index : the GIS server interface provides the interface with disk-based GIS. The MR-tree proposed propagates node splits upward only if one of the internal nodes on the insertion path has empty space. Thus, the internal nodes of the MR-tree are almost 100% full. Our experimental study shows that the two-dimensional MR-tree performs search up to 2.4 times faster than the ordinary R-tree. To use virtual memory techniques, the memory data manager uses page tables for spatial data, non- spatial data, T-tree and MR-tree. And, it uses indirect addressing techniques for fast reloading from disk.

• Journal of KIISE:Software and Applications
• /
• v.29 no.1_2
• /
• pp.98-113
• /
• 2002

In this paper, we present advanced algorithms to reduce the computations of block matching algorithms for motion estimation in video coding. Advanced multi-level successive elimination algorithms(AMSEA) are based on the Multi-level successive elimination algorithm(MSEA)[1]. The first algorithm is that when we calculate the sum of absolute difference (SAD) between the sum norms of sub-blocks in MSEA, we use the partial distortion elimination technique. By using the first algorithm, we can reduce the computations of MSEA further. In the second algorithm, we calculate SAD adaptively from large value to small value according to the absolute difference values between pixels of blocks. By using the second algorithm, the partial distortion elimination in SAD calculation can occur early. So, the computations of MSEA can be reduced. In the third algorithm, we can estimate the elimination level of MSEA. Accordingly, the computations of the MSEA related to the level lower than the estimated level can be reduced. The fourth algorithm is a very fast block matching algorithm with nearly 100% motion estimation accuracy. Experimental results show that AMSEA are very efficient algorithms for the estimation of motion vectors.