• Proceedings of the KSME Conference
• /
• 2008.11a
• /
• pp.1103-1106
• /
• 2008

For the current display process, the innovative micro pattern fabrication process using semiconductor process should be developed, which requires the expensive equipment, the limited process environment and the expensive optic-sensitive material. The effort of process innovation during past several years ends up the limit of cost reduction. The existing ink jet technologies such as a thermal bubble ink jet printing and a piezo ink jet printing are required to shorten the nozzle diameter in order to apply to the micro pattern fabrication. In this paper, as one way to cope these problems the micro pattern equipment based on the electrostatic ink jet has been developed and carried out some experiments.

• Journal of the Korean Ceramic Society
• /
• v.53 no.5
• /
• pp.541-547
• /
• 2016

In developing high temperature molds with advantages of the sand and precision (investment) castings, mechanical properties of the mold were improved through homogeneous coating of starting powders with an inorganic binder and improvement of fabrication process. Beads with mullite composition were employed for properties of the mold under high temperature, which was compared with artificial sands. Precursors of silica and sodium oxide were used as starting materials for an inorganic binder to achieve homogeneous coating on the starting powders. Strength was enhanced by the glass phase converted from the inorganic binder through heat treatment process. Also, two kinds of process, wet and dry processes, were incorporated to prepare mold specimens. Consequently, fabrication process of the mold with superior strength and high temperature applicability, compared with the previous molds for sand casting, could be suggested through control of the starting material and enhancement of the vitrification efficiency.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.13 no.11
• /
• pp.954-958
• /
• 2000

The characterization of zinc diffusion processes applied for high-speed avalanche photodiodes has been examined. The different diffusion process conditions for InP test structures were explored. The zinc diffusion profiles, such as the diffusion depth and the zinc dopant concentration, were examined using secondary ion mass spectrometry with varying the process variables and material parameters. It is observed that the diffusion profiles are severly impacted on the process parameters, such as the amount of Zn$_3$P$_2$ source and the diffusion time, as well as material parameters, such as doping concentration of diffusion layer. These results can be utilized for the high-speed avalanche photodiode fabrication.

• Proceedings of the Korean Powder Metallurgy Institute Conference
• /
• 2006.09a
• /
• pp.366-367
• /
• 2006

Carbon nanotubes (CNTs) have attracted remarkable attention as reinforcement for composites owing to their outstanding mechanical properties. The CNT/Cu nanocomposite is fabricated by a novel fabrication process named molecular level process. The novel process for fabricating CNT/Cu composite powders involves suspending CNTs in a solvent by surface functionalization, mixing Cu ions with CNT suspension, drying, calcination and reduction. The molecular level process produces CNT/Cu composite powders whereby the CNTs are homogeneously implanted within Cu powders. The mechanical properties of CNT/Cu nanocomposite, consolidated by spark plasma sintering of CNT/Cu composite powders, shows about 3 times higher strength and 2 times higher Young's modulus than those of Cu matrix.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2000.07a
• /
• pp.731-734
• /
• 2000

The characterization of Zinc diffusion processes applied fur high-speed avalanche photodiodes has been examined. The different diffusion process conditions for InP test structures were explored. The Zinc diffusion profiles, such as the diffusion depth and the Zinc dopant concentration, were examined using secondary ion mass spectrometry with varying the process variables and material parameters. It is observed that the diffusion profiles are severely impacted on the process parameters, such as the amount of Zn$_3$P$_2$source and the diffusion time, as well as material parameters, such as doping concentration of diffusion layer. These results can be utilized for the high-speed avalanche photodiode fabrication.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2004.10a
• /
• pp.73-77
• /
• 2004

This paper presents a PC-based controller of industrial SFFS(Solid Freeform Fabrication System). The SFFS has multiple sub-controllers for the building room, the powder room, the temperature, and the density of oxygen in the chambers. Hence the main PC-based controller should effectively and timely send commands to the sub-controllers, and monitor the overall SLS process. The required actuators and sensors are selected to optimize the overall performance of the SFFS.

• IE interfaces
• /
• v.12 no.3
• /
• pp.437-447
• /
• 1999

Modeling and system development for the fabrication process in the semiconductor manufacturing is presented in this paper. Maximization of wafer production can be achieved by the wafer flow balance under high utilization of bottleneck machines. Relatively simpler model is developed for the fabrication line by considering main characteristics of logistics. Simulation system is developed to evaluate the line performance such as balance rate, utilization, WIP amount and wafer production. Scheduling rules and input rules are suggested, and tested on the simulation system. We have shown that there exists good combination of scheduling and input rules.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.24 no.6
• /
• pp.992-997
• /
• 1987

This paper describes the design and fabrication of an integrated circuit that can separate the horizontal SYNC., vertical SYNC. and composite SYNC. signal included in a composite video signal. The circuit that is based on the comparator level samplign method can separate a stable SYNC. signal even from an external circuit with large variation. It has been fabrivated by the SST bipolar process. Its chip size is 1.5x1.5mm\ulcorner As a result, we succeeded in fabrication of IC which satisfied DC characteristics and SYNC. singal separator function.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
• /
• 2003.10a
• /
• pp.103-105
• /
• 2003

The high speed of RSFQ circuits is based on the self-resetting in the overdamped Josephson junctions. The SIS technology using Nb/A1$_2$O$_3$/Nb trilayer has been successfully adopted as a standard technology. However the newly suggested SINIS technology attracts interest because the junction itself is overdamped without any external shunt, and provides possibility of simplification of RSFQ circuit design and fabrication. In this paper we demonstrate RSFQ circuit fabrication process using SINIS technology.

• The Transactions of the Korean Institute of Electrical Engineers C
• /
• v.48 no.8
• /
• pp.577-579
• /
• 1999

DLC film remaining on device surface could be removed by eliminating AI sacrificial layer as a final step of lift-off process in the fabrication of DLC-coated Si-tip FEA. The field emission properties(I-V curves, hysteresis, and current fluctuation etc.) of the processed device were analyzed and the process was employed to 1.76 inch-sized FEA panel fabrication in order to evaluate its FED applicability.