• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.2 s.332
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• pp.83-88
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• 2005

We propose the design method for the VLSI architecture of FNNPDS combined PDS(partial distance search) and FNNS(fast nearest neighbor search), which are used to fast encoding in vector quantization, and obtain the results that FNNPDS(fast nearest neighbor partial distance search) is faster method than the conventional methods by simulation. In simulations, we investigate timing diagrams described searching time of the nearest codevector for an input vector, and compare the average clock cycles per input vector for Lena and Peppers images. According to the result of simulations, the number of the clock cycle of FNNPDS was reduced to $79.2\%\~11.7\%$ as compared with the number using the conventional techniques.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.41 no.4
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• pp.63-67
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• 2004

The conventional typical techniques as fast codebook generation methods are PDS, FNNS, and FC. In this paper, we propose FCNNPDS integrated the conventional methods to generate a codebook. The results of simulations show that the computational magnitude of FCNNPDS is reduced to 40-95% lower than conventional techniques. But comparison computation has no relation with k dimension of vectors, that is, because the computational magnitude of comparison is smaller than others, therefore FCNNPDS may be the best method than the conventional methods.