• Title/Summary/Keyword: FFT method

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A Study on the Analysis Method of Tracking Process using Voltage Waveforms (전압파형을 이용한 트래킹 진전과정 분석방법에 관한 연구)

  • Jee, Sung-Wook;Lee, Chun-Ha;Yoon, Dae-Hee;Song, Hyun-Jik;Shim, Kwang-Yul;Park, Won-Ju;Lee, Kwang-Sik
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.20 no.8
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    • pp.30-35
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    • 2006
  • Voltage is generally and exactly measured in the electric and electronic field. So, we studied method for detecting electric equipment faulty state using only electric voltage. It is called the Partition-FFT. Tracking is simulated by method and tester proceed on IEC 60112. We analyze voltage waveforms by tracking tester with Partition-FFT. As the result tracking process is clearly distinguished by 6 steps. Tracking is one of the major reason of electric accidents. The Partition-FFT is using a digital oscilloscope and a computer software. If Partition-FFT analysis is applied to the electricity facilities, We can prevent from happenning electric accidents cause of tacking breakdown with low prices and easy measurment. Most of all, Partition-FFT is system that make a visual tacking process. So, everyone is able to detect to possibility of electric accidents.

A Design of High Throughput 512-point FFT Processor (고성능 512-point FFT 프로세서의 설계)

  • 김선호;김정우;오길남;김기철
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 1999.11b
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    • pp.255-260
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    • 1999
  • This paper shows the design of a high throughput 512-point FFT processor. The performance target of the 512-point FFT processor is to achieve data symbol rate required for OFDM systems. The memory requirement of the 512-point FFT processor is minimized by adopting shuffle memory system. The hardware cost of the 512-point in processor is further reduced by using a complex multiplier with a new strength reduction method.

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Comparison between FFT and LSC Method for the Residual Geoid Height Modeling in Korea (한국의 잔여지오이드고 모델링을 위한 FFT 및 LSC 방법 비교)

  • Lee, Dong Ha;Yun, Hong Sic;Suh, Yong Cheol
    • KSCE Journal of Civil and Environmental Engineering Research
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    • v.31 no.2D
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    • pp.323-334
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    • 2011
  • In this study, we performed the residual geoid modeling using the FFT and LSC methods in context of application of R-R (Remove and Restore) technique as a general technique for gravimetric geoid model in order to propose the effective way of geoid determination in Korea. For this, a number of data compiled for residual geoid modeling by the multi-band spherical FFT method with Stoke's formula and LSC method as known as statistical method. The geometric geoidal heights obtained from 503 GPS/Levelling data were used for inducing the various elements and proper computation process which should be considered for improving the accuracy of residual geoid modeling. Finally, we statistically compared the results of residual geoid heights between FFT and LSC methods and reviewed then the proper way of residual geoid modeling to the region of Korea. As the results of comparison, LSC method is not suitable for residual geoid modeling in Korea due to the noise and lack of gravity observations and the effects of local characteristics, while FFT method by applying Stokes' integral with proper cap size and modified kernel which provides the better accuracy of residual geoid heights up to 10 cm more than those of LSC method.

Design of an IFFT∪FFT processor with manipulated coefficients based on the statistics distribution for OFDM (확률분포 특성을 이용한 OFDM용 IFFT∪FFT프로세서 설계)

  • Choi, Won-Chul;Lee, Hyun;Cho, Kyoung-Rok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.12
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    • pp.87-94
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    • 2003
  • In this paper, we propose an IFFT/FFT design method to minimize quantization error in IEEE 802.11a WLAN. In the proposed algorithm, the twiddle coefficient of IFFT/FFT processor is manipulated by the statistics distribution of the input data at each stage. We applies this algorithm to radix-2/$^2$ SDF architecture. Both IFFT and FFT processor shares the circuit blocks cause to the symmetric architecture. The maximum quantization error with the 10 bits length of the input and output data is 0.0021 in IFFT and FFT that has a self-loop structure with the proposed method. As a result, the proposed architecture saves 3bits for the data to keep the same resolution compared with the conventional method.

Design of a Radix-8/4/2 variable FFT processor for OFDM systems (OFDM 시스템을 위한 radix-8/4/2 가변 FFT 프로세서의 설계)

  • Kim, Young-Jin;Kim, Hyung-Ho;Lee, Hyon-Soo
    • Journal of Digital Convergence
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    • v.11 no.2
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    • pp.287-297
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    • 2013
  • In this paper, we propose an efficient variable-length radix-8/4/2 FFT architecture for OFDM systems. The FFT processor is based on radix-8 FFT algorithm and also supports radix-4 or radix-2 FFT computation. We are using efficient "In-place" memory access method to maintain conflict-free data access and minimize memory size. Also we replace a very large lookup table with a twiddle factor generator which consumes less area then a ROM-based lookup table. The proposed FFT processor performs variable-length FFT including 64, 256, 512, 1024, 2048, 4096 and 8192 points which cover all the required FFT lengths used in 802.11a, 802.16a, DAB, DVB-T, VDSL and ADSL.

Efficient Signal Reordering Unit Implementation for FFT (FFT를 위한 효율적인 Signal Reordering Unit 구현)

  • Yang, Seung-Won;Lee, Jang-Yeol
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.6
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    • pp.1241-1245
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    • 2009
  • As FFT(Fast Fourier Transform) processor is used in OFDM(Orthogonal Frequency Division Multiplesing) system. According to increase requirement about mobility and broadband, Research about low power and low area FFT processor is needed. So research concern in reduction of memory size and complex multiplier is in progress. Increasing points of FFT increase memory area of FFT processor. Specially, SRU(Signal Reordering Unit) has the most memory in FFT processor. In this paper, we propose a reduced method of memory size of SRU in FFT processor. SRU of 64, 1024 point FFT processor performed implementation by VerilogHDL coding and it verified by simulation. We select the APEX20KE family EP20k1000EPC672-3 device of Altera Corps. SRU implementation is performed by synthesis of Quartus Tool. The bits of data size decide by 24bits that is 12bits from real, imaginary number respectively. It is shown that, the proposed SRU of 64point and 1024point achieve more than 28%, 24% area reduction respectively.

A Study on the variable points IFFT/FFT processor (재구성 가능한 가변 포인트 IFFT/FFT 프로세서 설계에 관한 연구)

  • Choi Won-Chul;Goo Jeon-Hyoung;Lee Hyun;Oh Hyun-Seo
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.12
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    • pp.61-68
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    • 2004
  • Wireless mobile communication systems request high speed mobility and high speed data transmission capability. In order to meet the requirements, OFDM(Orthogonal Frequency Division Multiplex) is mainly adopted in the physical layer of the wireless systems. In commercial wireless mobile systems, IEEE802.(11a, 16e, etc) series seem to be used as the modulation method. For supporting multiple air-interfaces in a wireless mobile system, different kinds of OFDM based modulation methods should be supported in one modem chip. It requires a variable point IFFT/FFT or reconfigurable IFFT/FFT processor. In this paper, we propose the design method of a reconfigurable IFFT/FFT processor. In addition, it is shown that a reconfigurable IFFT/FFT processor can he implemented by using the proposed method.

Surface Temperature in Sliding Systems Using the FFT Finite Element Analysis (FFT-FEM을 이용한 윤활 기구에서 표면온도에 관한 연구)

  • 조종두;안수익
    • Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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    • 1999.06a
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    • pp.73-79
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    • 1999
  • Finite element equations by using fast Fourier transformation were formulated for studying temperatures resulting from frictional heating in sliding systems. The equations include the effect of velocity of moving components. The program developed by using FFT-FEM that combines Fourier transform techniques and the finite element method, was applied to the sliding bearing system. Numerical prediction obtained by FFT-FEM was in an excellent agreement of experimental temperature measurements.

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Ameliolation of FFT (FFT의 개선)

  • 안지득;안지환;안수길
    • The Journal of the Acoustical Society of Korea
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    • v.1 no.1
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    • pp.60-64
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    • 1982
  • Redundancies in the computational procedure of the FFT by which the DFT is calculated are analized and a modified algorithm to reduce redundancies is proposed. An amended FFT fortran program adopting the proposed algorithm shows that the time necessary for DFT computation is decreased about one-tenth. The proposed method can be applied to the most of other transformation algorithms.

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Manufacturing Data Preprocessing Method and Product Classification Method using FFT (FFT를 활용한 제조데이터 전처리 및 제품분류)

  • Kim, Han-sol;Jin, Kyo-hong
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2021.10a
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    • pp.82-84
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    • 2021
  • Through the smart factory construction project, sensor data such as power, vibration, pressure, and temperature are collected from production facilities, and services such as predictive maintenance, defect prediction, and abnormality detection are developed through data analysis. In general, in the case of manufacturing data, because the imbalance between normal and abnormal data is extreme, an anomaly detection service is preferred. In this paper, FFT method is used to extract feature data of manufacturing data as a pre-stage of the anomaly detection service development. Using this method, we classified the produced products and confirmed results. In other words, after FFT of the representative pattern for each product, we verified whether product classification was possible or not, by calculating correlation coefficient.

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