• Journal of KIISE:Computer Systems and Theory
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• v.27 no.10
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• pp.848-860
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• 2000

본 논문에서는 한 번에 여러 개의 명령어를 이슈할 수 있는 다중 이슈 프로세서(in-order, multiple-issue processors)에 대해 최악 실행시간을 분석하는 기법을 제시한다. 명령어들의 이슈 형태를 분석하기 위해서 명령어들 사이의 의존성 간계를 표현하는 IDG(Instruction Dependence Graph)라고 하는 자료구조를 사용한다. 이 자료구조로부터 각 명령어들의 이슈간 거리 범위를 구하고, 프로그램의 계층적인 분석 과정에서 점차로 더 정확한 이슈간 거리 범위로 갱신한다. 프로그램의 최악 실행시간은 최종적으로 얻어진 프로그램 전체에 대한 IDG를 분석하여 얻은 명령어들의 이슈간 거리 범위로부터 계산한다. 제안하는 기법을 구현한 시간 분석기를 사용하여 실험한 결과, 논문에서 사용한 다중 이슈 프로세서 모델에 대해서 정확하게 다중 이슈 형태를 분석할 수 있었다.

• Journal of KIISE:Computer Systems and Theory
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• v.28 no.11
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• pp.561-572
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• 2001

Since energy consumption of CMOS circuits has a quadratic dependency on the supply voltage, lowering the supply voltage is the most effective way of reducing energy consumption. We propose an intra-task voltage scheduling algorithm for low-energy hard real-time applications. Based on a static timing analysis technique, the proposed algorithm controls the supply voltage within an individual task boundary. By fully exploiting all the slack times, as scheduled program by the proposed algorithm always complete its execution near the deadline, thus achieving a high energy reduction ratio. In order to validate the effectiveness of the proposed algorithm, we built a software tool that automatically converts a DVS-unaware program into an equivalent low-energy program. Experimental results show that the low-energy version of an MPEG-4 encoder/decoder (converted by the software tool) consumes less than 7~25% of the original program running on a fixed-voltage system with a power-down mode.

• Journal of Computing Science and Engineering
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• v.4 no.2
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• pp.128-152
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• 2010

With the advance of computer and communication technologies, wireless sensor networks (WSNs) are increasingly used in many aspects of our daily life. However, since the battery lifetime of WSN nodes is restricted, the WSN lifetime is also limited. Therefore, it is crucial to determine this limited lifetime in advance for preventing service interruptions in critical applications. This paper proposes a feasible static analysis approach to estimating the worstcase lifetime of a WSN. Assuming known routes with a given sensor network topology and SMAC as the underlying MAC protocol, we statically estimate the lifetime of each sensor node with a fixed initial energy budget. These estimations are then compared with the results obtained through simulation which run with the same energy budget on each node. Experimental results of our research on TinyOS applications indicate that our approach can safely and accurately estimate worst-case lifetime of the WSN. To the best of our knowledge, our work is the first one to estimate the worst-case lifetime of WSNs through a static analysis method.

• Journal of Positioning, Navigation, and Timing
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• v.12 no.4
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• pp.437-445
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• 2023

A space system refers to a network of sensors, ground systems, and space-craft operating in space. The security of space systems relies on information systems and networks that support the design, launch, and operation of space missions. Characteristics of space operations, including command and control (C2) between space-craft (including satellites) and ground communication, also depend on wireless frequency and communication channels. Attackers can potentially engage in malicious activities such as destruction, disruption, and degradation of systems, networks, communication channels, and space operations. These malicious cyber activities include sensor spoofing, system damage, denial of service attacks, jamming of unauthorized commands, and injection of malicious code. Such activities ultimately lead to a decrease in the lifespan and functionality of space systems, and may result in damage to space-craft and, lead to loss of control. The Cybersecurity Adversarial Tactics, Techniques, and Common Knowledge (ATT&CK) matrix, proposed by Massachusetts Institute of Technology Research and Engineering (MITRE), consists of the following stages: Reconnaissance, Resource Development, Initial Access, Execution, Persistence, Privilege Escalation, Defense Evasion, Credential Access, Discovery, Lateral Movement, Collection, Command & Control, Exfiltration, and Impact. This paper identifies cybersecurity activities in space systems and satellite navigation systems through the National Institute of Standards and Technology (NIST)'s standard documents, former U.S. President Trump's executive orders, and presents risk management activities. This paper also explores cybersecurity's tactics attack techniques within the context of space systems (space-craft) by referencing the Sparta ATT&CK Matrix. In this paper, security threats in space systems analyzed, focusing on the cybersecurity attack tactics, techniques, and countermeasures of space-craft presented by Space Attack Research and Tactic Analysis (SPARTA). Through this study, cybersecurity attack tactics, techniques, and countermeasures existing in space-craft are identified, and an understanding of the direction of application in the design and implementation of safe small satellites is provided.

• Journal of KIISE:Computing Practices and Letters
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• v.9 no.2
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• pp.166-181
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• 2003

With the rapid growth of Internet, many devices such as Web TVs, PDAs and Web phones, begin to be directly connected to the Internet. These devices need real-time operating systems (RTOS) to support complex real-time applications running on them. Development of such real-time applications called embedded internet applications, is difficult due to the lack of adequate tools, especially debuggers. In this paper we present a new tracepoint debugging tool for the Qplus-T RTOS embedded system, which facilitates the instrumentations of the real-time software applications with timing trace-points. Compared with traditional breakpoint debugger, this trace-point debugger provides the ability to dynamically collect and record application data for on-line examination and for further off-line analysis. And, the trace-points can also provide the means for assigning new values to the running application's variables, without neither halting its execution nor interfering with its natural execution flow. Our trace-point debugger provides a highly efficient method for adding numerous monitoring trace-points within a real time target application such as Qplus-T internet applications, utilizing these trace-points to monitor and to analyze the application's behavior while it is running. And also, our trace debugger is different from previous one in that we can specify and detect the timing violations using its RTL (Real-Time Logic) trace experiments.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.14 no.3
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• pp.1337-1362
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• 2020

Advances in localization-based technologies and the increase in ubiquitous computing have led to a growing interest in location-based applications and services. High accuracy of the position of a wireless device is still a crucial requirement to be satisfied. Firstly, the rapid development of wireless communication technologies has affected the location accuracy of radio monitoring systems employed locally and globally. Secondly, the location is determined using standard complex computing methods and needs a relatively long execution time. In this paper, two geolocalization techniques, based on trigonometric and CORDIC computing processes, are proposed and implemented for Bluetooth-based indoor monitoring applications. Theoretical analysis and simulation results are investigated in terms of accuracy, scalability, and responsiveness. They show that the proposed techniques can locate a target wireless device accurately and are well suited for timing estimation.

• Journal of the Korea Society of Computer and Information
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• v.11 no.6 s.44
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• pp.113-123
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• 2006

Flash memory has been increasingly used in handhold devices not only for data storage, but also for code storage. Because NAND flash memory only provides sequential access feature, a traditionally accepted solution to execute the program from NAND flash memory is shadowing. But, shadowing has significant drawbacks increasing a booting time of the system and consuming severe DRAM space. Demand paging has obtained significant attention for program execution from NAND flash memory. But. one of the issues is that there has been no effort to bound demand paging cost in flash memory and to analyze the worst case performance of demand paging. For the worst case timing analysis of programs running from NAND flash memory. the worst case demand paging costs should be estimated. In this paper, we propose two different WCRT analysis methods considering demand paging costs, DP-Pessimistic and DP-Accurate, depending on the accuracy and the complexity of analysis. Also, we compare the accuracy butween DP-Pessimistic and DP-Accurate by using the simulation.

• Journal of the Korean Society of Earth Science Education
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• v.16 no.2
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• pp.182-195
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• 2023

The purpose of this study was to analyze reports from research middle schools based on the criteria for process-focused assessment to find out how the characteristics of process-focused assessment were being implemented in middle school science classes. The analysis criteria for the characteristics of process-focused assessment (integration of lessons and assessments, evaluation elements and methods, content and timing of feedback, and learner growth management) were extracted. Using the analysis framework, the result reports of seven research middle schools for process-focused assessment were analyzed. In terms of integration of lessons and assessments, when the process-focused assessment was operated, the class and evaluation plan were well implemented based on the curriculum achievement standards, but the process-focused assessment was recognized as a performance evaluation. In terms of evaluation elements and methods, the evaluation element for knowledge was the main component, and competency was presented in the planning stage, but competency was not dealt with in class execution. The evaluation method was biased toward teacher-centered observation evaluation and written test, and the setting of scoring criteria for each evaluation element was insufficient. In terms of the content and timing of feedback, feedback was mainly provided based on achievement confirmation, but no case was found in which scaffolding was provided at an appropriate time for insufficient parts in the learning process. In terms of the learner's growth management, the competencies cultivated through science classes were included in the detailed subject specialties of the school record. However, little was shown in the report on how to systematically manage the process of developing learners' competencies and reflect the evaluation results to teachers' class improvement.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.8
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• pp.337-347
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• 2007

An embedded system is called a multi-mode embedded system if it performs multiple applications by dynamically reconfiguring the system functionality. Further, the embedded system is called a multi-mode multi-task embedded system if it additionally supports multiple tasks to be executed in a mode. In this Paper, we address a HW/SW partitioning problem, that is, HW/SW partitioning of multi-mode multi-task embedded applications with timing constraints of tasks. The objective of the optimization problem is to find a minimal total system cost of allocation/mapping of processing resources to functional modules in tasks together with a schedule that satisfies the timing constraints. The key success of solving the problem is closely related to the degree of the amount of utilization of the potential parallelism among the executions of modules. However, due to an inherently excessively large search space of the parallelism, and to make the task of schedulabilty analysis easy, the prior HW/SW partitioning methods have not been able to fully exploit the potential parallel execution of modules. To overcome the limitation, we propose a set of comprehensive HW/SW partitioning techniques which solve the three subproblems of the partitioning problem simultaneously: (1) allocation of processing resources, (2) mapping the processing resources to the modules in tasks, and (3) determining an execution schedule of modules. Specifically, based on a precise measurement on the parallel execution and schedulability of modules, we develop a stepwise refinement partitioning technique for single-mode multi-task applications. The proposed techniques is then extended to solve the HW/SW partitioning problem of multi-mode multi-task applications. From experiments with a set of real-life applications, it is shown that the proposed techniques are able to reduce the implementation cost by 19.0% and 17.0% for single- and multi-mode multi-task applications over that by the conventional method, respectively.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.45 no.10
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• pp.863-871
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• 2017

LMS (least mean square) algorithm widely used in the AVCS (active vibration control system) of helicopters calculates control input using the forward path transfer function and error signal. If the error signal is sinusoidal, it can be represented as the combination of cosine and sine functions with frequency and phase synchronized with the reference signal. The control input also has the same frequency, therefore control algorithm can be simply implemented if the cosine and the sine amplitudes of the control input are calculated and the frequency and phase of the reference signal are used. Calculation of the control input is implemented as simple matrix operation and the change of the control command is slower than the frequency of the error signal, consequently control algorithm can be operated at lower frequency. The signal processing algorithm extracting cosine and sine components of the error signals are modeled using Simulink and PIL (processor-in-the-loop) mode simulation was executed for real-time performance evaluation.