• Proceedings of the Korean Information Science Society Conference
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• 2003.10b
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• pp.367-369
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• 2003

인공위성 탑재 소프트웨어는 정해진 시간 내에 필요한 작업을 수행하여야 하는 실시간 내장형 소프트웨어로 타이밍 분석이 중요하다. 기존의 인공위성소프트웨어 개발 시 적용되는 타이밍 분석기법은 개발자의 수작업에 의존하여 많은 시간과 노력이 요구되며 정확성에 문제가 있을 수 있는 단점이 있었다. 본 논문에서는 위성소프트에어의 타이밍 분석에 적용 가능한 최장 실행시간 (Worst Case Execution Time, WCET) 기법을 조사하고 보다 정확한 (tight) WCET를 구하기 위해 입력 데이터를 고려한 WCET 분석 방안을 제안한다.

• Transactions of the Korean Society of Automotive Engineers
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• v.13 no.1
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• pp.194-203
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• 2005

The process of guaranteeing that a distributed real-time control system will meet its timing constraints, is referred to as schedulability analysis. However, schedulability analysis algorithm cannot be simply used to analyze the system because of complex calculations of algorithm. It is difficult for control engineer to understand the algorithm because it was developed in a software engineer's position. In this paper we introduce a Response-time Analysis Tool(RAT) which provides easy way far system designer to analyze the system by encapsulating calculation complexity. Based on the RAT, control engineer can verify whether all real-time tasks and messages in a system will be completed by their deadline in the system design phase.

• Transactions of the Korean Society of Automotive Engineers
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• v.22 no.5
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• pp.91-101
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• 2014

In this study, we presented a timing verification method for a passenger car diesel engine management system (EMS) using measurement-based worst-case execution time (WCET) analysis. In order to cope with AUTOSAR-compliant software architecture, a development process model is proposed. In the process model, a runnable is regarded as a test unit and its temporal behavior (i.e. maximum observed execution time, MOET) is obtained along with on-target functionality evaluation results during online unit test. Furthermore, a cost-effective framework for online unit test is proposed. Because the runtime environment layer and the standard calibration environment are utilized to implement test interface, additional resource consumption of the target processor is minimized. Using the proposed development process model and unit test framework, the MOETs of 86 runnables for diesel EMS are obtained with 213 unit test cases. Using the obtained MOETs of runnables, the WCETs of tasks are estimated and the schedulability is evaluated. From the schedulability analysis results, the problems of the initially designed schedule table is recognized and it is fixed by redesigning of the runnable mapping and task offset. Through the various test scenarios, the proposed method is validated.

• Journal of Biomedical Engineering Research
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• v.43 no.6
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• pp.375-381
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• 2022

Brain-computer interface (BCI) is a technology that allows users with motor disturbance to control machines by brainwaves without a physical controller. Motor imagery (MI)-BCI is one of the popular BCI techniques, but it needs a long calibration time for users to perform a mental task that causes high fatigue to the users. MI is reported as showing a similar neural mechanism as motor execution (ME) and motor observation (MO). However, integrative investigations of these three tasks are rarely conducted. In this study, we propose a new paradigm that incorporates three tasks (MI, ME, and MO) and conducted a comparative analysis. For this study, we collected Electroencephalograms (EEG) of motor imagery/execution/observation from 28 healthy subjects and investigated alpha event-related (de)synchronization (ERD/ERS) and classification accuracy (left vs. right motor tasks). As result, we observed ERD and ERS in MI, MO and ME although the timing is different across tasks. In addition, the MI showed strong ERD on the contralateral hemisphere, while the MO showed strong ERD on the ipsilateral side. In the classification analysis using a Riemannian geometry-based classifier, we obtained classification accuracies as MO (66.34%), MI (60.06%) and ME (58.57%). We conclude that there are similarities and differences in fundamental neural mechanisms across the three motor tasks and that these results could be used to advance the current MI-BCI further by incorporating data from ME and MO.

• Journal of KIISE:Computing Practices and Letters
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• v.5 no.4
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• pp.467-478
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• 1999

실시간 태스크의 최악 실행시간을 예측할 때 과예측이 발생하는 원인은, 첫째 프로그램의 동적인 최악 실행 행태를 정적으로 분석하는 것이 근본적으로 어렵기 때문이며, 둘째 최근의 RISC 형태 프로세서에 포함되어 있는 파이프라인 실행 구조와 캐쉬 등이 그러한 정적 분석을 더욱 어렵게 만들기 때문이다. 그런데 기존의 연구에서는 각각의 과예측 원인을 해결하기 위한 방법에 대해서만 언급하고 있을 뿐 분석의 정확도에서 각 원인이 차지하는 비중에 대해서는 언급하고 있지 않다. 이에 본 연구에서는 최악 실행시간 예측시 과예측을 유발하는 원인들, 즉 분석 요소들의 영향을 정량적으로 조사함으로써 기존의 최악 실행시간 분석 기법들이 보완해야 할 방향을 제시하고자 한다. 본 연구에서는 실험이 특정 분석 기법에 의존하지 않도록 하기 위하여 시뮬레이션 방법에 기반한다. 이를 위해 분석 요소별 스위치가 포함된 MIPS R3000 프로세서를 위한 시뮬레이터를 구현하였는데, 각 스위치는 해당 분석 요소에 대한 분석의 정확도 수준을 결정한다. 모든 스위치 조합에 대해서 시뮬레이션을 반복 수행한 다음 분산 분석을 수행하여 어떤 분석 요소가 가장 큰 영향을 끼치는지 고찰한다.Abstract Existing analysis techniques for estimating the worst case execution time (WCET) of real-time tasks still suffer from significant overestimation due to two types of overestimation sources. First, it is unavoidably difficult to predict dynamic behavior of programs statically. Second, pipelined execution and caching found in recent RISC-style processors even more complicate such a prediction. Although these overestimation sources have been attacked in many existing analysis techniques, we cannot find in the literature any description about questions like which one is most important. Thus, in this paper, we quantitatively analyze the impacts of overestimation sources on the accuracy of the worst case timing analysis. Using the results, we can identify dominant overestimation sources that should be analyzed more accurately to get tighter WCET estimations. To make our method independent of any existing analysis techniques, we use simulation based methodology. We have implemented a MIPS R3000 simulator equipped with several switches, each of which determines the accuracy level of the timing analysis for the corresponding overestimation source. After repeating simulation for all of the switch combinations, we perform the variance analysis and study which factor has the largest impact on the accuracy of the predicted WCETs.

• International Journal of Internet, Broadcasting and Communication
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• v.13 no.1
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• pp.134-142
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• 2021

This paper proposes a probabilistic method in analyzing timing measurements to determine the periodicity of real-time tasks. The proposed method fills a gap in existing techniques, which either concentrate on the estimation of worst-case execution times, or do not consider the stochastic behavior of the real-time scheduler. Our method is based on the Z-test statistical analysis which calculates the probability of the measured period to fall within a user-defined standard deviation limit. The distribution of the measured period should satisfy two conditions: its center (statistical mean) should be equal to the scheduled period of the real-time task, and that it should be symmetrical with most of the samples focused on the center. To ensure that these requirements are met, a data adjustment process, which omits any outliers in the expense of accuracy, is presented. Then, the Z-score of the distribution according to the user-defined deviation limit provides a probability which determines the periodicity of the real-time task. Experiments are conducted to analyze the timing measurements of real-time tasks based on real-time Linux extensions of Xenomai and RT-Preempt. The results indicate that the proposed method is able to provide easier interpretation of the periodicity of real-time tasks which are valuable especially in comparing the performance of various real-time systems.

• Journal of Positioning, Navigation, and Timing
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• v.6 no.3
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• pp.117-123
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• 2017

In this paper, we propose a performance index that can compare the position estimation performance according to the time slot allocation order, which is superior in the position estimation performance in the operation of the Link-16 based relative navigation system. In order to verify the validity of the performance index, a software-based Link-16 relative navigation system performance analysis platform composed of a signal generator, a signal reception and navigation algorithm execution unit, and a performance analysis unit was designed. Using the designed software platform, we analyzed the relationship between proposed performance index and position estimation performance according to time slot allocation order in the same position reference (PR) arrangement. The performance index of the proposed time slot allocation is expected to be utilized not only for the Link-16 system, but also for the Time Division Multiple Access (TDMA)-based navigation system.

• Journal of KIISE:Computer Systems and Theory
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• v.26 no.11
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• pp.1333-1343
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• 1999

경성 실시간 시스템의 태스크들은 논리적으로 올바른 결과를 산출해야 하지만 또한 각자의 시간 제한 조건을 만족하여야 한다. 간격제한 스케줄링은 시간 제한 조건이 시간 간격 제한으로 주어지는 실시간 태스크들을 스케줄하기 위하여 도입되었다. 간격제한 스케줄링에서의 각 태스크들은 시간 간격 제한 조건을 갖는데, 이것은 태스크의 두 연속적인 수행의 종료시간에 대해 제한을 가한다. 다시 말해, 간격제한 스케줄링에서의 각 태스크 수행은 그 태스크의 직전 수행 완료 시간으로부터 발생하는 데드라인을 갖는다. 간격제한 태스크 스케줄링에 관한 많은 연구는 단순화 방법에 기초하고 있다. 그러나, 우리는 이 논문에서 단순화 방법을 사용하지 않고, 정적 우선순위 및 정적 분리 제한 정책을 채용한 새로운 간격제한 태스크 스케줄링 방법을 제안한다. 제안된 정적 할당 방법은 스케줄링 분석 및 구현을 매우 간단히 할 수 있으며, 또한 스케줄러의 실행시간 오버헤드를 줄일 수 있다.Abstract Tasks in hard real-time systems must not only be logically correct but also meet their timing constraints. The distance-constrained scheduling has been introduced to schedule real-time tasks whose timing constraints are characterized by temporal distance constraints. Each task in the distance-constrained scheduling has a temporal distance constraint which imposes restriction on the finishing times of two consecutive executions of the task. Thus, each execution of a task in the distance-constrained scheduling has a deadline relative to the finishing time of the previous execution of the task.Much work on the distance-constrained task scheduling has been based on the reduction technique. In this paper, we propose a new scheme for the distance-constrained task scheduling which does not use the reduction technique but adopts static priority and static separation constraint assignment policy. We show that our static assignment approach can simplify the scheduling analysis and its implementation, and can also reduce the run-time overhead of the scheduler.

• ETRI Journal
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• v.36 no.3
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• pp.469-478
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• 2014

RSA signature algorithms using the Chinese remainder theorem (CRT-RSA) are approximately four-times faster than straightforward implementations of an RSA cryptosystem. However, the CRT-RSA is known to be vulnerable to fault attacks; even one execution of the algorithm is sufficient to reveal the secret keys. Over the past few years, several countermeasures against CRT-RSA fault attacks have tended to involve additional exponentiations or inversions, and in most cases, they are also vulnerable to new variants of fault attacks. In this paper, we review how Shamir's countermeasure can be broken by fault attacks and improve the countermeasure to prevent future fault attacks, with the added benefit of low additional costs. In our experiment, we use the side-channel analysis resistance framework system, a fault injection testing and verification system, which enables us to inject a fault into the right position, even to within $1{\mu}s$. We also explain how to find the exact timing of the target operation using an Atmega128 software board.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.11
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• pp.29-38
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• 1997

As the trend of the automation is increasing, the usage of the programmable automation equipments like programmable controller(PC), numerical controller(NC), distributed control systems(DCS) and robot controller is greatly expanding in the area of the industrial equipments. But the development of the programing language for the programmable automatic equipment is rarely accomplished. In this paper, we propose design and implementation technique of the real-time mechanism control language by adding time constraint constructs and timing analysis constructs ot conditional statement and iteration statement of a programming language. Moreover, we made it possible to predict plausibility of time constraint constructs of a real time application program at compilation time and developing execution time analysiss technique.