• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.11 no.3
• /
• pp.549-554
• /
• 2007

In this paper, the luminance and resistance from different electrode materials of external electrode fluorescent lamp are measured and analyzed. New materials and process technology of external electrode are very important for the developed characteristics in lamp fabrication. This experiment, three different types for the forming of external electrode are Cu and Al taping, silver paste, Ni and Cu electrode-less plating methods. In the measurement of luminance, the results of brightness by Ni and Au plating methods for the external electrode on lamp glass are presented and also compared with the results by the methods using different electrode materials. The measured resistance values of Ni and Au plating process showed a little bit higher than that of silver paste process in spite of developed results of brightness. The Ni and Ni/Au plating processes are demonstrated best results and also showed a little bit different brightness due to different previous surface etching treatments.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.10 no.3
• /
• pp.213-224
• /
• 2010

An optically controlled silicon MESFET (OPFET) was fabricated by diffusion process to enhance the quantum efficiency, which is the most important optoelectronic device performance usually affected by ion implantation process due to large number of process induced defects. The desired impurity distribution profile and the junction depth were obtained solely with diffusion, and etching processes monitored by atomic force microscope, spreading resistance profiling and C-V measurements. With this approach fabrication induced defects are reduced, leading to significantly improved performance. The fabricated OPFET devices showed proper I-V characteristics with desired pinch-off voltage and threshold voltage for normally-on devices. The peak photoresponsivity was obtained at 620 nm wavelength and the extracted external quantum efficiency from the photoresponse plot was found to be approximately 87.9%. This result is evidence of enhancement of device quantum efficiency fabricated by the diffusion process. It also supports the fact that the diffusion process is an extremely suitable process for fabrication of high performance optoelectronic devices. The maximum gain of OPFET at optical modulated signal was obtained at the frequency of 1 MHz with rise time and fall time approximately of 480 nS. The extracted transconductance shows the possible potential of device speed performance improvements for shorter gate length. The results support the use of a diffusion process for fabrication of high performance optoelectronic devices.

• Journal of Sensor Science and Technology
• /
• v.24 no.4
• /
• pp.264-269
• /
• 2015

An infrared (IR) bolometer measures the change of resistance by absorbing incident IR radiation and generates a signal as a function of the radiation intensity. Since a bolometer requires temperature stabilization and light filtering except for the infrared rays, it is essential for the device to be packaged meeting conditions that above mentioned. Minimization of heat loss is needed in order to stabilize temperature of bolometer. Heat loss by conduction or convection requires a medium, so the heat loss will be minimized if the medium is a vacuum. Therefore, vacuum packaging for bolometer is necessary. Another important element in bolometer packaging is germanium (Ge) window, which transmits IR radiation to heat the bolometer. To ensure a complete transmittance of IR light, anti-reflection (AR) coatings are deposited on both sides of the window. Although the transmittance of Ge window is high for IR rays, it is difficult to use frequently in low-price IR bolometer because of its high price. In this paper, we fabricated IR window by utilizing silicon (Si) substrate instead of Ge in order to reduce the cost of bolometer packaging. To enhance the IR transmittance through Si substrate, it is textured using Reactive Ion Etching (RIE). The texturing process of Si substrate is performed along with the change of experimental conditions such as gas ratio, pressure, etching time and RF power.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2014.02a
• /
• pp.426.1-426.1
• /
• 2014

For high performance thin film solar cells, texturing surface, enhancing the optical absorptionpath, is pretty important. Textured ZnO:Al transparent oxide layer of high haze is commonly used in Si thin film solar cells. In this paper, novel deposition method for aluminum doped zinc oxide (ZnO:Al) on glass substrates is presented to improve the haze property. The broccoli structure of ZnO:Al layer was formed on chemically etched glass substrates, which showed high haze value on a wide wavelength range.The etching condition of the glass substrates can change not only the haze values of the ZnO:Al of in-situ growth but alsothe electrical and optical properties of the deposited ZnO:Al films.The etching mechanism of the glass substrate affecting on the surface morphology of the glass will be discussed, which resulted in variation of texture of ZnO:Al layer. The optical properties of substrate morphology were also analyzed with EDS and FTIR results. As a result, the high haze value of 85.4% was obtained in the wavelength range of 300 nm to 1100 nm. Furthermore, low sheet resistance of about 5~18 ohm/sq was achieved for different surface morphologies of the ZnO:Al films.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2010.02a
• /
• pp.86-86
• /
• 2010

Micro- and nanoscale texturing and control of surface energy have been considered for superhydrophobicity on polymer and silicon. However these surfaces have been reported to be difficult to meet the robustness and transparency requirements for further applications, from self cleaning windows to biochip technology. Here we provided a novel method to fabricate a nearly superhydrophobic soda-lime glass using two-step method. The first step involved wet etching process to fabricate micro-sale patterns on soda-lime glass. The second step involved application of $SiO_x$-incorporated DLC to generate high intrinsic contact angle on the surface using chemical vapor deposition (CVD) process. To investigate the effect of surface roughness, we used both positive and negative micro-scale patterns on soda-limeglass, which is relatively hard for surface texturing in comparison to quartz or Pyrex glasses due to the presence of impurities, but cheaper. For all samples we tested the static wetting angle and transparency before and after 100 cycles of wear test using woolen steel. The surface morphology is observed using optical and scanning electron microscope (SEM). The results shows that negative patterns had a greater wear resistance while the hydrophobicity was best achieved using positive patterns having static contact angle up to 140 deg. with about 80% transparency. The overall experiment shows that positive patterns at etching time of 1 min shows the optimum transparency and hydrophobicity. The optimization of micro-scale pattern to achieve a robust, transparent, superhydrophobic soda-lime glass will be further investigated in the future works.

• Journal of IKEEE
• /
• v.20 no.3
• /
• pp.220-225
• /
• 2016

In this paer, low on-resistance and high-power trench gate MOSFET (Metal-Oxide-Silicon Field Effect Transistor) incorporating current sensing FET (Field Effect Transistor) is proposed and evaluated. The trench gate power MOSFET was fabricated with $0.6{\mu}m$ trench width and $3.0{\mu}m$ cell pitch. Compared with the main switching MOSFET, the on-chip current sensing FET has the same device structure and geometry. In order to improve cell density and device reliability, self-aligned trench etching and hydrogen annealing techniques were performed. Moreover, maintaining low threshold voltage and simultaneously improving gate oxide relialility, the stacked gate oxide structure combining thermal and CVD (chemical vapor deposition) oxides was adopted. The on-resistance and breakdown voltage of the high density trench gate device were evaluated $24m{\Omega}$ and 100 V, respectively. The measured current sensing ratio and it's variation depending on the gate voltage were approximately 70:1 and less than 5.6 %.

• Journal of the Korean Crystal Growth and Crystal Technology
• /
• v.32 no.1
• /
• pp.1-6
• /
• 2022

In this research, a ring-shaped silicon carbide (SiC) single crystal manufactured using the PVT (Physical Vapor Transport) method was proposed to be applied to a SiC focus ring in semiconductor etching equipment. A cylindrical graphite structure was placed inside the graphite crucible to grow a ring-shaped SiC single crystal by the PVT method. SiC single crystal ring without crack was successfully obtained in case of using SiC single crystal wafer as a seed. A plasma etching process was performed to compare plasma resistance between the CVD-SiC focus ring and the PVT-SiC focus ring. The etch rate of ring materials in PVT-single crystal SiC focus ring was definitely lower than that of CVD-SiC focus ring, indicating better plasma resistance of PVT-SiC focus ring.

• Korean Journal of Materials Research
• /
• v.19 no.1
• /
• pp.28-32
• /
• 2009

Silicon carbide (SiC) is a promising material for power device applications due to its wide band gap (3.26 eV for 4H-SiC), high critical electric field and excellent thermal conductivity. The Schottky barrier diode is the representative high-power device that is currently available commercially. A field plate edge-terminated 4H-SiC was fabricated using a lift-off process for opening the Schottky contacts. In this case, Ni/Ti dual-metal contacts were unintentionally formed at the edge of the Schottky contacts and resulted in the degradation of the electrical properties of the diodes. The breakdown voltage and Schottky barrier height (SBH, ${\Phi}_B$) was 107 V and 0.67 eV, respectively. To form homogeneous single-metal Ni/4H-SiC Schottky contacts, a deposition and etching method was employed, and the electrical properties of the diodes were improved. The modified SBDs showed enhanced electrical properties, as witnessed by a breakdown voltage of 635 V, a Schottky barrier height of ${\Phi}_B$=1.48 eV, an ideality factor of n=1.04 (close to one), a forward voltage drop of $V_F$=1.6 V, a specific on resistance of $R_{on}=2.1m{\Omega}-cm^2$ and a power loss of $P_L=79.6Wcm^{-2}$.

• Journal of the Korean Chemical Society
• /
• v.45 no.4
• /
• pp.341-350
• /
• 2001

Aluminum Hydroxide was employed as a thermal retardent and flame retardent for Chloropolyethylene (CPE) rubbery materials which is the construction material of automotive oil cooler hose. and then cure characteristics, physical properties, thermal resistance and flame retardation of compounded rubber were investigated, and optimum mixing conditions of rubber and flame retarding agent were deduced from the experimental results. CPE rubber material which has excellent properties of chemical corrosion resistance and cold resistance and inexpensive in price was used to prepare rubber specimen. The by-product of ething, produced from the process of surface treatment of aluminum was processed to aluminum hydroxide via crushing and purification, which is characterized by XRD, PSA, SEM and ICP-AES techniques in terms of phase, size, distribution, morphology and components of particles and then mixed to CPE rubber materials in the range of 0~80 phr. Hardness, tensile strength, elongation and thermal properties of compounded rubber specimens were tested. The optimum mixing ratio of rubber to additives to give maximum effect on thermal resistance and flame retardation, within the range of tolerable specification for rubber materials, was determined to be 40 phr. The flame retardation of CPE rubber materials was found to be increased by 5 times at this mixing ratio.

• Journal of the Microelectronics and Packaging Society
• /
• v.12 no.2 s.35
• /
• pp.111-119
• /
• 2005

Stack specimen with three dimensional interconnection structure through Cu via of $75{\mu}m$ diameter, $90{\mu}m$ height and $150{\mu}m$ pitch was successfully fabricated using subsequent processes of via hole formation with Deep RIE (reactive ion etching), Cu via filling with pulse-reverse electroplating, Si thinning with CMP, photolithography, metal film sputtering, Cu/Sn bump formation, and flip chip bonding. Contact resistance of Cu/Sn bump and Cu via resistance could be determined ken the slope of the daisy chain resistance vs the number of bump joints of the flip chip specimen containing Cu via. When flip- chip bonded at $270^{\circ}C$ for 2 minutes, the contact resistance of the Cu/Sn bump joints of $100{\times}100{\mu}m$ size was 6.7m$\Omega$ and the Cu via resistance of $75{\mu}m$ diameter, $90{\mu}m$ height was 2.3m$\Omega$.