• KIEE International Transactions on Electrophysics and Applications
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• v.5C no.3
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• pp.102-110
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• 2005

Piezoelectric transformers(PT) are expected to be small, thin and highly efficient, and which are attractive as a transformer with high power density for step down voltage. For these reasons, we have attempted to develop a step-down PT for the miniaturized adaptor. We propose a PT, operating in thickness extensional vibration mode for step-down voltage. This PT consists of a multi-layered construction in the thickness direction. In order to develop the step-down PT of 10 W class and turn ratio of 0.1 with high efficiency and miniaturization, the piezoelectric ceramics and PT designs are estimated with a variety of characteristics. The basic composition of piezoelectric ceramics consists of ternary yPb(Zr$_{x}$Ti$_{1-x}$)O$_{3}$-(1-y)Pb(Mn$_{1/3}$Nb1$_{1/3}$Sb$_{1/3}$)O$_{3}$. In the piezoelectric characteristics evaluations, at y=0.95 and x=0.505, the electromechanical coupling factor(K$_{p}$) is 58$\%$, piezoelectric strain constant(d$_{33}$) is 270 pC/N, mechanical quality factor(Qr$_{m}$) is 1520, permittivity($\varepsilon$/ 0) is 1500, and Curie temperature is 350 $^{\circ}C$. At y = 0.90 and x = 0.500, kp is 56$\%$, d33 is 250 pC/N, Q$_{m}$ is 1820, $\varepsilon$$_{33}$$^{T}$/$\varepsilon$$_{0}$ is 1120, and Curie temperature is 290 $^{\circ}C$. It shows the excellent properties at morphotropic phase boundary regions. PZT-PMNS ceramic may be available for high power piezoelectric devices such as PTs. The design of step-down PTs for adaptor proposes a multi-layer structure to overcome some structural defects of conventional PTs. In order to design PTs and analyze their performances, the finite element analysis and equivalent circuit analysis method are applied. The maximum peak of gain G as a first mode for thickness extensional vibration occurs near 0.85 MHz at load resistance of 10 .The peak of second mode at 1.7 MHz is 0.12 and the efficiency is 92$\%$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.11
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• pp.2541-2547
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• 2010

In this paper, we propose a design technique which replaces logic transistors of 1.2V with medium-voltage transistors of 3.3V having small off-leakage current in repetitive block circuits where speed is not an issue, to implement a low-power eFuse OTP memory IP in the stand-by state. In addition, we use dual-port eFuse cells reducing operational current dissipation by reducing capacitances parasitic to RWL (Read word-line) and BL (Bit-line) in the read mode. Furthermore, we propose an equivalent circuit for simulating program power injected to an eFuse from a program voltage. The layout size of the designed 512-bit eFuse OTP memory IP with a 90nm CMOS image sensor process is $342{\mu}m{\times}236{\mu}m$. It is confirmed by measurement experiments on 42 samples with a program voltage of 5V that we get a good result having 97.6 percent of program yield. Also, the minimal operational supply voltage is measured well to be 0.9V.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.2
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• pp.143-151
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• 2010

In this paper, a novel rectangular patch antenna is proposed to have Zeroth Order Resonance(ZOR) generated based on the Metamaterial Complosite Right- and Left-Handed(CRLH) structure. Making the in-phase electric field over the entire antenna other than a half-wavelength as the fundamental resonance mode of a standard microstrip patch or its positive multiple, the metallic patch is suggested to be capacitively coupled with only one surrounding rectangular ring, different from the previous 1D ZOR antennas commonly having several metal cells in line. The performance of the proposed antenna is simulated by a 3D field solver that inputs the sizes of the physical structure corresponding to the equivalent circuit designed to have ZOR at 2.4 GHz. Consequently, the resonance frequency, the gain and the antenna efficiency are observed 2.4 GHz, 5 dB and 98%, respectively. Besides, the important property of the proposed antenna is addressed as the combination of the low profile as an advantage of microstrip patch antennas, and the omni-directional field pattern typical of monopole antennas.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.6
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• pp.586-594
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• 2013

This paper proposes a new coupling element of microwave slot coupler for designing waveguide slot array which can reduce the effect of undesired higher order mode coupling between coupling and radiating slots in the branch waveguide. The proposed device is composed of a centered longitudinal shunt-series coupling slot at the center of broad wall shared by two crossed rectangular waveguides and an asymmetric compound iris that excites the coupling slot. We first have obtained scattering parameters for the proposed coupler by use of EM S/W tool HFSS and then extracted the parameters of T- network equivalent circuit for the coupling slot. We also have analyzed the resonant properties such as resonant length and normalized admittance by changing the geometrical dimensions. The measured results for the fabricated coupler with short-circuited block ${\lambda}_g/4$ away from the coupling slot are well agreed with the simulated ones.

• Journal of Electrical Engineering and Technology
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• v.2 no.1
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• pp.89-97
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• 2007

This paper presents a new circuit topology of active edge resonant snubbers assisted half-bridge soft switching PWM inverter type DC-DC high power converter for DC bus feeding power plants. The proposed DC-DC power converter is composed of a typical voltage source-fed half-bridge high frequency PWM inverter with a high frequency planar transformer link in addition to input DC busline side power semiconductor switching devices for PWM control scheme and parallel capacitive lossless snubbers. The operating principle of the new DC-DC converter treated here is described by using switching mode equivalent circuits, together with its unique features. All the active power switches in the half-bridge arms and input DC buslines can achieve ZCS turn-on and ZVS turn-off commutation transitions. The total turn-off switching losses of the power switches can be significantly reduced. As a result, a high switching frequency IGBTs can be actually selected in the frequency range of 60 kHz under the principle of soft switching. The performance evaluations of the experimental setup are illustrated practically. The effectiveness of this new converter topology is proved for such low voltage and large current DC-DC power supplies as DC bus feeding from a practical point of view.

• Journal of Power Electronics
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• v.17 no.4
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• pp.892-904
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• 2017

A design of a Class-E inverter with only one inductor and one capacitor is presented. It is operated at the optimal operation mode for domestic cooker. The design principle is based on the zero-voltage derivative switching (ZVDS) of the Class-E inverter with a parallel load network, which is a parallel resonant equivalent circuit. An induction load characterization is obtained from a large-signal excitation test bench, which is the key to an accurate design of the induction cooker system. Consequently, the proposed scheme provides a more systematic, simple, accurate, and feasible solution than the conventional quasi-resonant inverter analysis based on series load network methodology. The derivative of the switch voltage is zero at the turn-on transition, and its absolute value is relatively small at the turn-off transition. Switching losses and noise are reduced. The parameters of the ZVDS Class-E inverter for the domestic induction cooker must be selected properly, and details of the design of the components of this Class-E inverter need to be addressed. A 1,200 W prototype is designed and evaluated to verify the validation of the proposed topology.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.8
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• pp.52-59
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• 2007

In this paper, we analyzed and measured implant isolation characteristics for a 1.25 Gbps monolithic integrated hi-directional (M-BiDi) optoelectronic system-on-a-chip, which is a key component to constitute gigabit passive optical networks (PONs) for a fiber-to-the-home (FTTH). Also, we derived an equivalent circuit of the implant structure under various DC bias conditions. The 1.25 Gbps M-BiDi transmit-receive SoC consists of a laser diode with a monitor photodiode as a transmitter and a digital photodiode as a digital data receiver on the same InP wafer According to IEEE 802.3ah and ITU-T G.983.3 standards, a receiver sensitivity of the digital receiver has to satisfy under -24 dBm @ BER=10-12. Therefore, the electrical crosstalk levels have to maintain less than -86 dB from DC to 3 GHz. From analysed and measured results of the implant structure, the M-BiDi SoC with the implant area of 20 mm width and more than 200 mm distance between the laser diode and monitor photodiode, and between the monitor photodiode and digital photodiode, satisfies the electrical crosstalk level. These implant characteristics can be used for the design and fabrication of an optoelectronic SoC design, and expended to a mixed-mode SoC field.