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Design of low-power OTP memory IP and its measurement

저전력 OTP Memory IP 설계 및 측정

  • Received : 2010.09.16
  • Accepted : 2010.09.24
  • Published : 2010.11.30

Abstract

In this paper, we propose a design technique which replaces logic transistors of 1.2V with medium-voltage transistors of 3.3V having small off-leakage current in repetitive block circuits where speed is not an issue, to implement a low-power eFuse OTP memory IP in the stand-by state. In addition, we use dual-port eFuse cells reducing operational current dissipation by reducing capacitances parasitic to RWL (Read word-line) and BL (Bit-line) in the read mode. Furthermore, we propose an equivalent circuit for simulating program power injected to an eFuse from a program voltage. The layout size of the designed 512-bit eFuse OTP memory IP with a 90nm CMOS image sensor process is $342{\mu}m{\times}236{\mu}m$. It is confirmed by measurement experiments on 42 samples with a program voltage of 5V that we get a good result having 97.6 percent of program yield. Also, the minimal operational supply voltage is measured well to be 0.9V.

본 논문에서는 대기 상태에서 저전력 eFuse OTP 메모리 IP틀 구현하기 위해 속도가 문제가 되지 않는 반복되는 블록 회로에서 1.2V 로직 트랜지스터 대신 누설 (off-leakage) 전류가작은 3.3V의 MV (Medium Voltage) 트랜지스터로 대체하는 설계기술을 제안하였다. 그리고 읽기 모드에서 RWL (Read Word-Line)과 BL의 기생하는 커패시턴스를 줄여 동작전류 소모를 줄이는 듀얼 포트 (Dual-Port) eFuse 셀을 사용하였다. 프로그램 전압에 대한 eFuse에 인가되는 프로그램 파워를 모의실험하기 위한 등가회로를 제안하였다. 하이닉스 90나노 CMOS 이미지 센서 공정을 이용하여 설계된 512비트 eFuse OTP 메모리 IP의 레이아웃 크기는 $342{\mu}m{\times}236{\mu}m$이며, 5V의 프로그램 전압에서 42개의 샘플을 측정한 결과 프로그램 수율은 97.6%로 양호한 특성을 얻었다. 그리고 최소 동작 전원 전압은 0.9V로 양호하게 측정되었다.

Keywords

References

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Cited by

  1. Design of an 8 bit differential paired eFuse OTP memory IP reducing sensing resistance vol.19, pp.1, 2012, https://doi.org/10.1007/s11771-012-0987-4
  2. Design of 32-bit differential paired eFuse OTP memory in a form of two-dimensional array vol.19, pp.12, 2012, https://doi.org/10.1007/s11771-012-1433-3
  3. Post-Package 프로그램이 가능한 eFuse OTP 메모리 설계 vol.16, pp.8, 2010, https://doi.org/10.6109/jkiice.2012.16.8.1734