• 전기학회논문지
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• 제62권7호
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• pp.937-942
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• 2013

Equivalent series impedance of high-voltage pulsed power capacitor is one of the important electrical characteristics both for users and for capacitor manufacturers because it may have serious effects on the performance of pulse forming circuits. In this paper, definition of equivalent series impedance and factors which generate equivalent series impedance are reviewed. Theoretical analysis for the calculation of equivalent series impedance based on differential measurement method is described and calculation program has been developed. In order to acquire data which are necessary to calculate equivalent series impedance from discharging current waveform, charging-dischargig controller has been manufactured. Measurement results of equivalent series impedance for high voltage pulsed power capacitor have been given.

• 대한기계학회논문집B
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• 제35권9호
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• pp.897-902
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• 2011

PEMFC 의 내부에서 발생하는 화학반응은 계면의 물리적 조건 및 물성에 지배되고 그 거동은 임피던스로 표현된다. 일반적으로 임피던스 특성은 전기적 등가회로로 표현이 가능하기 때문에 PEMFC의 임피던스 계측 결과를 등가회로를 이용하여 해석함으로써 간단히 성능 진단을 할 수 있을 것이다. 본 연구에서는 이러한 등가회로를 이용하여 고분자 전해질 연료전지의 특성평가에 관한 기초연구를 수행하였다. 교류 임피던스 계측 값과 다양한 등가회로(단순 등가회로, CPE 를 고려한 등가회로, 2 개의 시정수를 고려한 등가회로, 2 개의 CPE 를 고려한 등가회로)를 이용하여 특성평가를 수행하였다. 그 결과 등가회로를 이용한 PEMFC 의 특성평가가 가능하고, 2 개의 CPE 를 고려한 등가회로가 가장 정도가 높음을 확인하였다.

• 한국군사과학기술학회지
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• 제12권3호
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• pp.282-289
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• 2009

This paper presents an estimation technique of the equivalent circuit parameters for an underwater acoustic piezoelectric transducer from the measured impedance. Estimated equivalent circuit can be used for the design of the impedance matching network of the sonar transmitter. A fitness function is proposed to minimize the error between the calculated impedance of the equivalent circuit and the measured impedance of the transducer. The equivalent circuit parameters are estimated by using the fitness function and the PSO(Particle Swarm Optimization) algorithm. The effectiveness of the proposed method is verified by the applications to a sandwich-type transducer and a dummy load. In addition, the impedance matching network is also designed by using the estimated equivalent circuit model.

• 전기학회논문지
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• 제61권3호
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• pp.373-379
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• 2012

This paper presents a fault location algorithm based on the adaptively estimated value of the local sequence source impedance for faults on a parallel transmission line. This algorithm uses only the local voltage and current signals of a faulted circuit. The remote current signals and the zero-sequence current of the healthy adjacent circuit are calculated by using the current distribution factors together with the local terminal currents of the faulted circuit. The current distribution factors consist of local equivalent source impedance and the others such as fault distance, line impedance and remote equivalent source impedance. It means that the values of the current distribution factors can change according to the operation condition of a power system. Consequently, the accuracy of the fault location algorithm is affected by the two values of equivalent source impedances, one is local source impedance and the other is remote source impedance. Nevertheless, only the local equivalent impedance can be estimated in this paper. A series of test results using EMTP simulation data show the effectiveness of the proposed algorithm. The proposed algorithm is valid for a double-circuit transmission line system where the equivalent source impedance changes continuously.

• KEPCO Journal on Electric Power and Energy
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• 제6권4호
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• pp.473-480
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• 2020

In this paper, we proposed a high frequency equivalent circuit considering parasitic impedance components for differential noise analysis on the input stage during DC-DC buck converter switching operation. Based on the proposed equivalent circuit model, we presented a method to measure parasitic impedance parameters included in DC bus plate, IGBT, and PCB track using the gain phase method of a network analyzer. In order to verify the validity of this model, a DC-DC prototype consisting of a buck converter, a signal analyzer, and a LISN device, and then resonance frequency was measured in the frequency range between 150 kHz and 30 MHz. The validity of the parasitic impedance measurement method and the proposed equivalent model is verified by deriving that the measured resonance frequency and the resonance frequency of the proposed high frequency equivalent model are the same.

• 전력전자학회논문지
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• 제20권6호
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• pp.526-533
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• 2015

A new algorithm is proposed for the estimation of equivalent grid impedance at the point of common coupling of a grid-tie inverter output. The estimated impedance parameter can be used for the improvement of the performance and the stability of the distributed generation system. The estimation error is inevitable in the conventional estimation method because of the axis rotation due to PLL. In the conventional estimation error, the d-q voltage and current are used for the calculation of the impedance with active and reactive current injections. Conversely, in the proposed algorithm, the negative sequence current is injected, and then the negative sequence voltage is measured for the impedance estimation. As the positive and negative sequence current controller is independent and the PLL is based on the positive sequence component only, the estimation of the equivalent impedance can be achieved with high accuracy. Simulation and experimental results are compared to validate the proposed algorithm.

• 한국전자통신학회논문지
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• 제18권4호
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• pp.595-600
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• 2023

본 논문에서는 λ/4 전송선로의 T형 등가회로를 응용하여 임의의 길이를 갖는 전송선로에 대한 T형 등가회로를 제안하였다. 또한, 동일한 선로 길이라는 제한 없이 등가회로의 스터브의 위치를 조정할 수 있도록 수식을 만들어 등가회로의 활용도를 높이고자 하였다. 또한, 제안된 T형 등가회로는 λ/4 전송선로 뿐만 아니라 임의의 선로 길이 및 임피던스를 갖는 경우에도 적용할 수 있다. 제안된 T형 등가회로의 활용 예로 4 분할된 T형 등가회로를 갖도록 구성하여 λ/4 임피던스 변환기에 적용하였다. 변형된 임피던스 변환기는 0.15λ로 설계되어 39.4%의 크기 감소율을 보였다.

• 한국음향학회지
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• 제28권4호
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• pp.363-369
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• 2009

본 논문에서는 인접된 다중모드 공진점을 갖는 수중 음향 압전 트랜스듀서의 전기적 등가회로 모델을 추정하는 방법을 제안하였다. 트랜스듀서의 실측된 임피던스와 추정된 등가모델의 임피던스 오차가 최소가 되도록 공진모드간 결합 영향을 고려한 적합도 함수를 제안하고, 미립자 집단 최적화 (PSO:Particle Swarm Optimization) 알고리즘을 이용하여 등가회로의 미지상수를 추정하였다. 3개의 공진점을 갖는 샌드위치형 예제 트랜스듀서에 대하여 제안된 방법을 적용하여 등가회로를 모델링하고, 수중에서의 임피던스 측정치와 추정된 등가모델의 임피던스를 비교함으로써 제안된 기법의 타당성을 검증하였다.

• Journal of Electrical Engineering and Technology
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• 제8권2호
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• pp.262-270
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• 2013

A boundary protection method for power distribution line based on equivalent boundary effect is presented in this paper. In the proposed scheme, the equivalent resonance component with a certain central frequency is sleeve-mounted at the beginning of protected zone. The 'Line Boundary' is built by using boundary effect, which is created by introducing impedance in the primary-side of line. The 'Line Boundary' is significantly different from line wave impedance. Therefore, the boundary protection principle can be applied to power distribution line without line traps. To analyze the frequency characteristic corresponding to traveling-waves of introducing impedance in the primary-side of line, distributed parameters model of equivalent resonance component is established. The results of PSCAD/EMTDC simulation prove the obvious difference of voltage high frequency component between internal faults and external faults due to equivalent resonance component, and validate the scheme.

• Journal of Power Electronics
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• 제19권5호
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• pp.1326-1335
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• 2019

Common mode (CM) chokes are a crucial part in EMI filters for mitigating the electromagnetic interference (EMI) of switched-mode power supplies (SMPS) and for meeting electromagnetic compatibility standards. However, the parasitic capacitances of a CM choke deteriorate its high frequency filtering performance, which results in increases in the design cycle and cost of EMI filters. Therefore, this paper introduces a negative capacitance generated by a negative impedance converter (NIC) to cancel the influence of equivalent parallel capacitance (EPC). In this paper, based on a CM choke equivalent circuit, the EPCs of CM choke windings are accurately calculated by measuring their impedance. The negative capacitance is designed quantitatively and the EPC cancellation mechanisms are analyzed. The impedance of the CM choke in parallel with negative capacitances is tested and compared with the original CM choke using an impedance analyzer. Moreover, a CL type CM filter is added to a fabricated NIC prototype, and the insertion loss of the prototype is measured to verify the cancellation effect. The prototype is applied to a power converter to test the CM conducted noise. Both small signal and EMI measurement results show that the proposed technique can effectively cancel the EPCs and improve the CM filter's high frequency filtering performance.