• Journal of IKEEE
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• v.18 no.2
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• pp.228-233
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• 2014

In this paper, we propose a CMOS-memristor hybrid circuit that can perform 4-bit multiplication for future energy-efficient computing in nano-scale digital systems. The proposed CMOS-memristor hybrid circuit is based on the parallel architecture with AND and OR planes. This parallel architecture can be very useful in improving the power-delay product of the proposed circuit compared to the conventional CMOS array multiplier. Particularly, from the SPECTRE simulation of the proposed hybrid circuit with 0.13-mm CMOS devices and memristors, this proposed multiplier is estimated to have better power-delay product by 48% compared to the conventional CMOS array multiplier. In addition to this improvement in energy efficiency, this 4-bit multiplier circuit can occupy smaller area than the conventional array multiplier, because each cross-point memristor can be made only as small as $4F^2$.

• Journal of Communications and Networks
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• v.16 no.1
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• pp.36-44
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• 2014

Exploiting the energy-delay tradeoff for energy saving is critical for developing green wireless communication systems. In this paper, we investigate the delay-constrained energy-efficient packet transmission. We aim to minimize the energy consumption of multiple randomly arrived packets in an additive white Gaussian noise channel subject to individual packet delay constraints, by taking into account the practical on-off circuit power consumption at the transmitter. First, we consider the offline case, by assuming that the full packet arrival information is known a priori at the transmitter, and formulate the energy minimization problem as a non-convex optimization problem. By exploiting the specific problem structure, we propose an efficient scheduling algorithm to obtain the globally optimal solution. It is shown that the optimal solution consists of two types of scheduling intervals, namely "selected-off" and "always-on" intervals, which correspond to bits-per-joule energy efficiency maximization and "lazy scheduling" rate allocation, respectively. Next, we consider the practical online case where only causal packet arrival information is available. Inspired by the optimal offline solution, we propose a new online scheme. It is shown by simulations that the proposed online scheme has a comparable performance with the optimal offline one and outperforms the design without considering on-off circuit power as well as the other heuristically designed online schemes.

• Proceedings of the KIPE Conference
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• 2001.12a
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• pp.159-163
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• 2001

A new and high-efficient energy-recovery circuit is proposed to drive a Plasma display panel (PDP) and compared with the conventional circuit. The Proposed circuit uses only two inductors and no auxiliary circuit to recover the energy stored in the equivalent intrinsic capacitance of Plow DP so that it feartures a very simple structure, small volume, fewer power devices. production cost and high efficiency. Besides, the light emitted from PDP is very stable and uniform. It is suitable for wall-hanging color TVs. The proposed circuit, operating at 200kHz, is verified to be applicable on a 42-inch PDP by an experiment.

• Proceedings of the KIEE Conference
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• 2008.10b
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• pp.169-172
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• 2008

This paper is a report of designing for high efficient LED lights driver. The main purpose of driver designing is meet the requirement the high efficient energy regulation for light of Korea. To meet the regulation the high efficient, the circuit adapted wide range resonant power supply and current regulate circuit to adjust LED current. This product archived excellent performance as well as reliable operation.

• Journal of IKEEE
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• v.23 no.3
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• pp.878-882
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• 2019

XOR(exclusive-OR)-XNOR(exclusive NOR) circuit is a basic component of 4-2 compressor for high performance arithmetic operation. In this paper we propose an energy efficient XOR-XNOR circuit. The proposed circuit is reduced the internal parasitic capacitance in critical path and implemented with 8 transistors. The circuit produces a perfect output signals for all input combinations. Compared with the previous circuits, the proposed circuit has a 14.5% reduction in propagation delay time and a 1.7% increase in power consumption. Therefore, the proposed XOR-XNOR is reduced power-delay- product (PDP) by 13.1% and energy-delay-product (EDP) by 26.0%. The proposed circuits are implemented with standard CMOS 0.18um technology and verified through SPICE simulation with 1.8V supply voltage.

• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.505-508
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• 2000

A coreless printed circuit board(PCB) transformer is employed in a contactless energy transfer circuit that achieves an efficient power conversion at the presence of a considerable airgap between the source and the load side. A half-bridge series resonant converter is selected as the contactless energy transfer circuit in order to minimize the detrimental effects of large leakage inductance small magnetizing inductance and poor coupling coefficient of the coreless PCB transformer. The operation and performance of the proposed contactless power converter are verified on a 7 W experimental circuit that provides an 18V/0.4A output from a 210-370 V input source.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.2
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• pp.121-128
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• 2002

A new high-efficient energy-recovery circuit is proposed to drive a plasma display panel (PDP) and compared with the conventional circuit. The proposed circuit uses only two inductors and no auxiliary circuit to recover the energy stored in the equivalent intrinsic capacitance of PDP. Therefore it features a simpler structure, less mass, lower cost of production, higher efficiency, and fewer power devices. The very stable and uniform light emitted from PDP proves the high quality of screen. It is suitable for wall-hanging color TVs. The proposed circuit, operating at 200kHz, is verified to be applicable on a 42-inch PDP by experimental results.

• Journal of IKEEE
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• v.25 no.1
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• pp.206-211
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• 2021

This paper proposes a Self-Reset Zero-Current Switching (ZCS) Circuit for thermoelectric energy harvesting. The Self-Reset ZCS circuit minimizes the operating current consumed by the voltage comparator, thereby reduces the power consumption of the energy harvesting circuit and improves the energy conversion efficiency by adding the self-reset function to the comparator. The Self-Reset ZCS circuit shows 3.4% of improvement in energy efficiency compared to the energy harvesting system with the conventional analog comparator ZCS for the output/input voltage ratio of 5.5 as a result of circuit simulation. The proposed circuit is useful for improving the performance of the wearable and bio-health-related harvesting circuits, where low-power and energy-efficient thermoelectric energy harvesting is needed.

• Journal of Sensor Science and Technology
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• v.33 no.3
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• pp.134-138
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• 2024

In this study, we propose a ternary D flip-flop using tristate ternary inverters for an energy-efficient ternary circuit design of sequential logic. The tristate ternary inverter is designed by adding the functionality of the transmission gate to a standard ternary inverter without an additional transistor. The proposed flip-flop uses 18.18% fewer transistors than conventional flip-flops do. To verify the advancement of the proposed circuit, we conducted an HSPICE simulation with CMOS 28 nm technology and 0.9 V supply voltage. The simulation results demonstrate that the proposed flip-flop is better than the conventional flip-flop in terms of energy efficiency. The power consumption and worst delay are improved by 11.34% and 28.22%, respectively. The power-delay product improved by 36.35%. The above simulation results show that the proposed design can expand the Pareto frontier of a ternary flip-flop in terms of energy consumption. We expect that the proposed ternary flip-flop will contribute to the development of energy-efficient sensor systems, such as ternary successive approximation register analog-to-digital converters.

• Vacuum Magazine
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• v.2 no.2
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• pp.12-16
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• 2015

Organic photovoltaics (OPVs) have attracted significant interest in an interdisciplinary research field for the decades as a next-generation photovoltaic device due to their unique advantages. One of requirements for OPVs having high power conversion efficiency is the favorable energy level alignment between the electrode/organic and organic/organic interfaces to manage the exciton dissociation and improve the charge transport. In this review, strategies to enhance the OPV performance by controlling the energy level alignment are discussed. The insertion of an exciton blocking layer leads to the efficient dissociation of photogenerated excitons at the donor/acceptor interface enhancing the short-circuit current density. The choice of a donor having a high ionization energy and an acceptor having a low electron affinity increases the open-circuit voltage. The insertion of an appropriate work function modifier which reduces the charge injection barrier removes the S-kink in current density-voltage characteristics of OPVs and improves the fill factor. This review would give a valuable guide to design the efficient OPV structure.