• Title/Summary/Keyword: Encoders

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Design of Turbo Code Interleaver Using Union Bound (유니온 상한을 이용한 터보코드의 인터리버 설계)

  • 안홍영
    • Proceedings of the IEEK Conference
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    • 2000.11a
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    • pp.161-164
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    • 2000
  • Given the frame size and constituent encoders, interleaver plays a central role in a turbo code performance. Interleaver should be designed to generate a heavy weight codeword in the second encoder if the first encoder generates a low weight codeword. In this paper we present a search procedure for high performace interleaver whose performance is measured by computing union bound using the weight spectrum of all the weight 2, 3

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Design of Internal Interleaver of Turbo Code for Sync-IMT2000 (동기식 IMT-2000을 위한 터보코드의 내부 인터리버의 설계)

  • 나병철;정상국;남명우;노승용
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.230-233
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    • 2000
  • A parallel concatenated convolutional coding scheme consists of two constituent systematic convolutional encoders linked by an interleaver. The information bits at the input of the first encoder are scrambled by the interleaver before entering the second encoder.〔1〕-〔3〕Now many different interleavers are presented for Turbo code. The topic of this paper is to design of the interleaver which is for IS-2000 Turbo code.

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Velocity Measurement System Design Based on Quantization Error Constraint

  • Katsunori, Shida;Toyonori, Matsuda
    • 제어로봇시스템학회:학술대회논문집
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    • 2001.10a
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    • pp.86.1-86
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    • 2001
  • Combined with a counter, wheel or strip encoders which have equally divided markers are one of frequent measuring choices towards various applications in terms of cost, simplicity, and diversity of measurements, e.g., measuring displacement, velocity, acceleration, and so on. Often, velocity is measured by counting the series of reference clocks for a period of time which sensor-carrying device took for traveling two adjacent encoding markers. Quantizaion error of such that the disturbance caused by quantization error is under control. This paper identifies design issues, developes theory, and proposes a paradigm to design a velocity measurement system such ...

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Recognition and tracking system of moving objects based on artificial neural network and PWM control

  • Sugisaka, M.
    • 제어로봇시스템학회:학술대회논문집
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    • 1992.10b
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    • pp.573-574
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    • 1992
  • We developed a recognition and tracking system of moving objects. The system consists of one CCD video camera, two DC motors in horizontal and vertical axles with encoders, pluse width modulation(PWM) driving unit, 16 bit NEC 9801 microcomputer, and their interfaces. The recognition and tracking system is able to recognize shape and size of a moving object and is able to track the object within a certain range of errors. This paper presents the brief introduction of the recognition and tracking system developed in our laboratory.

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DC-free error correcting codes based on convolutional codes (길쌈부호를 이용한 무직류 오류정정부호)

  • 이수인;김정구;주언경
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.5
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    • pp.24-30
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    • 1995
  • A new class of DC-error correcting codes based on convolutional codes is proposed with its performance analysis. The proposed codes can be encoded and decoded using the conventional convolutional encoders and decoders with slight modifications. And the codes have null point at DC and capable of correcting errors. The DC-free error correcting codes are especially well suited for applications in high-speed channels.

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SENSORLESS SPEED CONTROL OF INDUCTION MOTOR WITH SPEED ESTIMATOR (자속추정기에 의한 유도전동기 센서리스 속도제어)

  • 김성환
    • Journal of Advanced Marine Engineering and Technology
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    • v.23 no.4
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    • pp.432-439
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    • 1999
  • Several methods of induction motor drives which used speed estimators instead of shaft encoders have been reported. However those speed sensorless systems with estimators employing stator voltates and currents usually deteriorates as the speed gets lower because it is difficult to calculate the accurate rotor flux under the influence of DC-offset and saturation of integrators. In this paper to calculate rotor flux at low speed the new rotor flux estimator which replaces integra-tors with two lag circuits is proposed. Simulation and experiment results confirm the validity of this control scheme.

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An Adaptation Technique for Various Terminals of MPEG-4 Contents by an Object-based Scaling (객체-기반 스케일링에 의한 MPEG-4 컨텐츠의 다양한 터미널 적응 기법)

  • 이숙영;차경애;김상욱
    • Proceedings of the Korea Multimedia Society Conference
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    • 2003.05b
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    • pp.646-649
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    • 2003
  • This paper describes a model and system development for support an object-based scalability to provide adaptive MPEG-4 contents. One of the problem encountered by a multimedia service in heterogeneous network environment is the variation in the client's playback capability. Therefore, we provide technique which give an adaptability to MPEG-4 encoders so that make it possible to service adaptive MPEG-4 contents to a certain end terminal.

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UTV localization from fusion of Dead -reckoning and LBL System

  • Woon, Jeon-Sang;Jung Sul;Cheol, Won-Moon;Hong Sup
    • 제어로봇시스템학회:학술대회논문집
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    • 2001.10a
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    • pp.64.4-64
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    • 2001
  • Localization is the key role in controlling the Mobile Robot. In this papers, a development of the sensor fusion algorithm for controling UTV(Unmanned Tracked Vehicle) is presented. The multi-sensocial dead-rocking subsystem is established based on the optimal filtering by first fusing heading angle reading from a magnetic compass, a rate-gyro and two encoders mouned on the robot wheels, thereby computing the deat-reckoned location. These data and the position data provoded by LBL system are fused together by means of an extended Kalman filter. This algorithm is proved by simulation studies.

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A study on Development of Footwear Shape Scanner for Off-Line Robot Path Programming

  • Lho, Tae-Jung;Song, Se-Hoon;Ju, Hyun-Woo;Lee, Jung-Wook;Cho, Jae-Kung;Ahn, Hee-Tae
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.808-812
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    • 2003
  • We need a lot of manpower and we can cut down a labor cost by applying industrial robots the footwear bonding automation process. In this study, we suggest how to program off-line robot path along a shoe's outsole shape in the footwear bonding process by 5-axis microscribe system like robot arms. This microscribe system development consists 5-axis microscribe mechanics, signal processing circuit, and PC with software. It is the system for making database of a shoe's outsole through the movement of a microscribe with many joints. To do this, first read 5-encoders' pulse values while a robot arm points a shoe's outsole shape from the initial status. Then, calculate a relative shoe's outsole by Denavit-Hatenberg's (D-H) direct Kinematics of known length of links and coordinate values. Next, calculate the encoders' pulse values of the robot arm's rotation and transmitting the angle pulse values to the PC through a circuit. Finally, it is able to display a shoe's outsole at real-time by computing the Denvavit-Hantenberg's (D-H) direct kinematics in the PC. With the coordinate values calculated above, we can draw a bonding gauge-line on the upper. Also, we can make off-line robot path programming compute a shoe's bonding area on the upper. These results will be effectively applied for programming a robot path on off-line and automatically.

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Architecture of an LDPC Decoder for DVB-S2 using reuse Technique of processing units and Memory Relocation (연산기와 메모리 재사용을 이용한 효율적인 DVB-S2 규격의 LDPC 복호기 구조)

  • Park Jae-Geun;Lee Chan-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.9 s.351
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    • pp.31-37
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    • 2006
  • Low-density parity-check (LDPC) codes are recently emerged due to its excellent performance. The standard for European high definition satellite digital video broadcast, DVB-S2 has adopted LDPC codes as a channel coding scheme. This paper proposes a DVB-S2 LDPC decoder architecture using a hybrid parity check matrix which is efficient in hardware implementation for both decoders and encoders. The hybrid H-matrices are constructed so that both the semi-random technique and the partly parallel structure can be applied to design encoders and decoders. Using the hybrid H-matrix scheme, the architecture of LDPC decoder for DVB-S2 can be very practical and efficient. In addition, we show a new Variable Node processor Unit (VNU) architecture to reuse the VNU for various code rates and optimized block memory placement to reuse. We design a DVB-S2 LDPC decoder of code rate 1/2 usng the proposed architecture. We estimate the performance of the DVB-S2 LDPC decoder and compare it with other decoders.