• Title/Summary/Keyword: Embedded Software Test Method

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Embedding Built-in Tests in Hot Spots of an Object-Oriented Framework (객체지향 프레임웍의 Hot Spot에 Built-in Tests를 내장하는 방법)

  • Shin, Dong-Ik;Jeon, Tae-Woong;Lee, Syung-Young
    • Journal of KIISE:Software and Applications
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    • v.29 no.1_2
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    • pp.65-79
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    • 2002
  • Object-oriented frameworks need to be systematically tested because they are reused in developing many applications software. They also need additional testing whenever they are extended for reuse. Frameworks, however, have properties that make it difficult to control and observe the testing of the parts that were modified and extended. In this paper, we describe the method of embedding test components as BIT(Built-In Test) into the framework's hot spots in order to efficiently detect the faults through testing that occurred while implementing application programs by modifying and extending the framework. The test components embedded into a framework make it easy to control and observe testing the framework, and thereby improve the testability of frameworks. Test components designed by the method proposed in this paper can be dynamically attached and detached to/from hot spots of a framework without changes or intervention to the framework code.

A Model-based Test Approach and Case Study for Weapon Control System (모델기반 테스트 기법 및 무장통제장치 적용 사례)

  • Bae, Jung Ho;Jang, Bucheol;Koo, Bongjoo
    • Journal of the Korea Institute of Military Science and Technology
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    • v.20 no.5
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    • pp.688-699
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    • 2017
  • Model-based test, a well-known method of the black box tests, is consisted of the following four steps : model construction using requirement, test case generation from the model, execution of a SUT (software under test) and detection failures. Among models constructed in the first step, state-based models such as UML standard State Machine are commonly used to design event-based embedded systems (e.g., weapon control systems). To generate test cases from state-based models in the next step, coverage-based techniques such as state coverage and transition coverage are used. Round-trip path coverage technique using W-Method, one of coverage-based techniques, is known as more effective method than others. However it has a limitation of low failure observability because the W-Method technique terminates a testing process when arrivals meet states already visited and it is hard to decide the current state is completely same or not with the previous in the case like the GUI environment. In other words, there can exist unrevealed faults. Therefore, this study suggests a Extended W-Method. The Extended W-Method extends the round-trip path to a final state to improve failure observability. In this paper, we compare effectiveness and efficiency with requirement-item-based technique, W-Method and our Extended W-Method. The result shows that our technique can detect five and two more faults respectively and has the performance of 28 % and 42 % higher failure detection probability than the requirement-item-based and W-Method techniques, respectively.

Generating Test Cases of Simulink/Stateflow Model Based on RRT Algorithm Using Heuristic Input Analysis (휴리스틱 입력 분석을 이용한 RRT 기반의 Simulink/Stateflow 모델 테스트 케이스 생성 기법)

  • Park, Hyeon Sang;Choi, Kyung Hee;Chung, Ki Hyun
    • KIPS Transactions on Software and Data Engineering
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    • v.2 no.12
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    • pp.829-840
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    • 2013
  • This paper proposes a modified RRT (Rapidly exploring Random Tree) algorithm utilizing a heuristic input analysis and suggests a test case generation method from Simulink/Stateflow model using the proposed RRT algorithm. Though the typical RRT algorithm is an efficient method to solve the reachability problem to definitely be resolved for generating test cases of model in a black box manner, it has a drawback, an inefficiency of test case generation that comes from generating random inputs without considering the internal states and the test targets of model. The proposed test case generation method increases efficiency of test case generation by analyzing the test targets to be satisfied at the current state and heuristically deciding the inputs of model based on the analysis during expanding an RRT, while maintaining the merit of RRT algorithm. The proposed method is evaluated with the models of ECUs embedded in a commercial passenger's car. The performance is compared with that of the typical RRT algorithm.

Shear behavior of non-persistent joints in concrete and gypsum specimens using combined experimental and numerical approaches

  • Haeri, Hadi;Sarfarazi, V.;Zhu, Zheming;Hokmabadi, N. Nohekhan;Moshrefifar, MR.;Hedayat, A.
    • Structural Engineering and Mechanics
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    • v.69 no.2
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    • pp.221-230
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    • 2019
  • In this paper, shear behavior of non-persistent joint surrounded in concrete and gypsum layers has been investigated using experimental test and numerical simulation. Two types of mixture were prepared for this study. The first type consists of water and gypsum that were mixed with a ratio of water/gypsum of 0.6. The second type of mixture, water, sand and cement were mixed with a ratio of 27%, 33% and 40% by weight. Shear behavior of a non-persistent joint embedded in these specimens is studied. Physical models consisting of two edge concrete layers with dimensions of 160 mm by 130 mm by 60 mm and one internal gypsum layer with the dimension of 16 mm by 13 mm by 6 mm were made. Two horizontal edge joints were embedded in concrete beams and one angled joint was created in gypsum layer. Several analyses with joints with angles of $0^{\circ}$, $30^{\circ}$, and $60^{\circ}$ degree were conducted. The central fault places in 3 different positions. Along the edge joints, 1.5 cm vertically far from the edge joint face and 3 cm vertically far from the edge joint face. All samples were tested in compression using a universal loading machine and the shear load was induced because of the specimen geometry. Concurrent with the experiments, the extended finite element method (XFEM) was employed to analyze the fracture processes occurring in a non-persistent joint embedded in concrete and gypsum layers using Abaqus, a finite element software platform. The failure pattern of non-persistent cracks (faults) was found to be affected mostly by the central crack and its configuration and the shear strength was found to be related to the failure pattern. Comparison between experimental and corresponding numerical results showed a great agreement. XFEM was found as a capable tool for investigating the fracturing mechanism of rock specimens with non-persistent joint.

Emulation-Based Fuzzing Techniques for Identifying Web Interface Vulnerabilities in Embedded Device Firmware (임베디드 디바이스 펌웨어의 웹 인터페이스 취약점 식별을 위한 에뮬레이션 기반 퍼징 기법)

  • Heo, Jung-Min;Kim, Ji-Min;Ji, Cheong-Min;Hong, Man-Pyo
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.29 no.6
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    • pp.1225-1234
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    • 2019
  • The security of the firmware is more important because embedded devices have become popular. Network devices such as routers can be attacked by attackers through web application vulnerabilities in embedded firmware. Therefore, they must be found and removed quickly. The Firmadyne framework proposes a dynamic analysis method to find vulnerabilities after emulating firmware. However, it only performs vulnerability checks according to the analysis methods defined in the tool, thus limiting the scope of vulnerabilities that can be found. In this paper, fuzzing is performed in emulation-based environment through fuzzing, one of the software security test techniques. We also propose a Fabfuzz tool for efficient emulation based fuzzing. Experiments have shown that in addition to the vulnerabilities identified in existing tools, other types of vulnerabilities have been found.

A Design of an AES-based Security Chip for IoT Applications using Verilog HDL (IoT 애플리케이션을 위한 AES 기반 보안 칩 설계)

  • Park, Hyeon-Keun;Lee, Kwangjae
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.67 no.1
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    • pp.9-14
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    • 2018
  • In this paper, we introduce an AES-based security chip for the embedded system of Internet of Things(IoT). We used Verilog HDL to implement the AES algorithm in FPGA. The designed AES module creates 128-bit cipher by encrypting 128-bit plain text and vice versa. RTL simulations are performed to verify the AES function and the theory is compared to the results. An FPGA emulation was also performed with 40 types of test sequences using two Altera DE0-Nano-SoC boards. To evaluate the performance of security algorithms, we compared them with AES implemented by software. The processing cycle per data unit of hardware implementation is 3.9 to 7.7 times faster than software implementation. However, there is a possibility that the processing speed grow slower due to the feature of the hardware design. This can be solved by using a pipelined scheme that divides the propagation delay time or by using an ASIC design method. In addition to the AES algorithm designed in this paper, various algorithms such as IPSec can be implemented in hardware. If hardware IP design is set in advance, future IoT applications will be able to improve security strength without time difficulties.

Securing a Cyber Physical System in Nuclear Power Plants Using Least Square Approximation and Computational Geometric Approach

  • Gawand, Hemangi Laxman;Bhattacharjee, A.K.;Roy, Kallol
    • Nuclear Engineering and Technology
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    • v.49 no.3
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    • pp.484-494
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    • 2017
  • In industrial plants such as nuclear power plants, system operations are performed by embedded controllers orchestrated by Supervisory Control and Data Acquisition (SCADA) software. A targeted attack (also termed a control aware attack) on the controller/SCADA software can lead a control system to operate in an unsafe mode or sometimes to complete shutdown of the plant. Such malware attacks can result in tremendous cost to the organization for recovery, cleanup, and maintenance activity. SCADA systems in operational mode generate huge log files. These files are useful in analysis of the plant behavior and diagnostics during an ongoing attack. However, they are bulky and difficult for manual inspection. Data mining techniques such as least squares approximation and computational methods can be used in the analysis of logs and to take proactive actions when required. This paper explores methodologies and algorithms so as to develop an effective monitoring scheme against control aware cyber attacks. It also explains soft computation techniques such as the computational geometric method and least squares approximation that can be effective in monitor design. This paper provides insights into diagnostic monitoring of its effectiveness by attack simulations on a four-tank model and using computation techniques to diagnose it. Cyber security of instrumentation and control systems used in nuclear power plants is of paramount importance and hence could be a possible target of such applications.

Embedded Software Test Method Using I/O Value Manipulation (입출력 변수 조작에 의한 임베디드 소프트웨어 테스트 방법)

  • Kim, Dae-Woo;Jung, Ki-Hyun;Choi, Kyung-Hee
    • Proceedings of the Korea Information Processing Society Conference
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    • 2005.05a
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    • pp.623-626
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    • 2005
  • 임베디드 소프트웨어가 날이 갈수록 그 규모가 커지고 복잡해짐에 따라 임베디드 소프트웨어의 품질에 대한 검증 및 테스트는 중요한 문제로 부각하고 있다. 임베디드 소프트웨어의 신뢰성을 확보와 비용절감을 위한 테스트 자동화 시스템의 개발이 필요하다. 이 문서는 테스트 자동화 시스템을 구축하는 과정에서 테스트 대상인 임베디드 시스템의 입출력 변수들의 조작을 통하여 시스템 의존적인 부분을 효과적으로 일반화 시키는 방법을 제시한다. 이 방법을 통하여 테스트 명령을 간소화 할 수 있었으며 테스트 자동화 시스템의 모델을 보다 일반적이고 쉽게 표현할 수 있었다.

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Design of the TFM Based System Test Model for embedded Software of Weapon Systems (TFM 기반 무기체계 소프트웨어의 시스템 테스트 모델 설계)

  • Kim Jae-Hwan;Yoon Hee-Byung
    • Proceedings of the Korean Information Science Society Conference
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    • 2006.06c
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    • pp.172-174
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    • 2006
  • 본 연구에서는 시간 요소를 고려한 무기체계 소프트웨어의 시스템 테스트 모델을 제시한다. 이를 위해 컴포넌트 기반의 UML 표기법과 무기체계의 시간 제약 특징을 고려한 무기체계 소프트웨어의 시스템 테스트 모델인 TFM(Time Factor Method) 모델을 제안한다. TFM 모델은 세 가지 요소인 (X.Y,Z)으로 구성되어 있는데. "X" 에서는 최대시간경로를 선정하는 알고리즘을 통해 테스트 케이스가 도출되고, "Y" 에서는 Sequence Diagram과 관련된 컴포넌트(오브젝트)를 식별하고, "Z"에서는 Timing Diagram을 통하여 식별된 각각의 컴포넌트의 실행시간을 측정한다. 또한 제안된 TFM 모델의 적용사례를 들어 테스트 케이스를 도출한다.

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A Co-design Method for JPEG2000 Video Compression System in Telemetry using DSP and FPGA (DSP와 FPGA의 Co-design을 이용한 원격측정용 임베디드 JPEG2000 시스템구현)

  • Yu, Jae-Taeg;Hyun, Myung-Han;Nam, Ju-Hun
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.39 no.9
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    • pp.896-903
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    • 2011
  • In this paper, a co-design method for JPEG2000 video compression system using DSP and FPGA is presented. By profiling the complexity of JPEG2000 algorithm, it is noticed that a MQ-coder is the most complex part. Thus, we implement the MQ-coder on FPGA for the parallel processing using VHDL to reduce the complexity. In order to verify the performance of the MQ-coder, JBIG2 standard test vector and images are used. The experimental results show that the proposed MQ-coder enhances the processing time approximately 3 times compared with the previous software MQ-coder.