• IEMEK Journal of Embedded Systems and Applications
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• v.5 no.3
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• pp.128-135
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• 2010

Recently complexity of embedded software cause to be used real-time operating system (RTOS) to implement various functions in the embedded system. And also, according to requirement of complex functions in embedded systems, the number as well as complexity of tasks get increased continuously. In case that many tasks collaborated in a microprocessor, context switching time between tasks is a overhead waisting a CPU resource. Therefore the time of task context switching is an important factor that affects performance of RTOS. In this paper, we concentrate on the improvement of task context switch for reducing overhead and achieving fast response time in RTOS. To achieve these goal, we suggest multiple register files and task context switching algorithm. By reducing the context switch overhead, we try to ease scheduling and assure fast response times in multitasking environment. As a result, the context switch overhead decreased by 8~16% depend on the number of register files, and some task set which are not schedulable with single register file are schedulable due to that decrease with multiple register files.

• Proceedings of the Korean Information Science Society Conference
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• 2005.11a
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• pp.871-873
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• 2005

최근 임베디스 시스템의 성능이 향상됨에 따라, 임베디드 시스템을 구성하는 CPU와 주변 장치들의 성능 격차를 해소하는 문제가 점차 중요해지고 있다. 그 중에서 시스템의 성능에 가장 큰 영향을 미치는 것이 CPU와 메모리간의 통신이다. 고성능 컴퓨터 시스템에서는 그동안 CPU와 메모리간의 성능 격차를 줄이기 위한 여러 가지 연구들이 활발하게 진행되었는데, 여러 가지 연구들 중에서 메모리를 압축하여 메모리의 기억공간을 효율적으로 확장하는 방법이 효과적으로 사용되고 있다. 임베디드 시스템에서도 이러한 기법을 적절하게 적용하면 메모리를 압축함으로써 동일 공간에 보다 많은 데이터를 저장할 수 있고, 버스를 이용하여 데이터를 전송할 때, 보다 많은 정보를 전송할 수 있게 된다. 또한, CPU와 메모리 간의 전송되는 정보의 크기를 줄일 수 있으므로 임베디드 시스템에서 전력소모의 대부분을 차지하고 있는 CPU와 메모리 간의 전력소모를 크게 줄일 수 있는 장점이 있다. 본 논문에서는 빈발 패턴 압축 기법을 적절하게 변형하여 임베디드 시스템을 위한 효율적인 메모리 압축 기법을 제시하고자 한다.

• Journal of Korea Multimedia Society
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• v.15 no.7
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• pp.920-930
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• 2012

In this paper, we designed and built a wired temperature controller system which is based on ASIC for a wireless temperature controller system based on FPGA. FPGA devices and wireless controller systems are growing quickly especially for industrial systems for sensing temperature and humidity. FPGA can set up a desired system and a CPU, and directly set up or change a peripheral device based on an IP quickly for an affordable price. This wireless system is easy to install in the field where there are lots of changes and the system is complex. It also has advantages for maintenance. In this study, we are using a 32 bit RISC CPU based on MicroBlaze, with a touch interface, peripheral device, and porting the embedded Linux. Also, we added wireless communication using ZigBee. With this system we provide remote monitoring and control through the web by adding a web server. Compared to the original system, we say not only a performance improvement, but also more efficient development and cheaper costs. In this study, we focused especially on building a better development environment and a more effective user interface.

• Journal of the Korea Institute of Military Science and Technology
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• v.10 no.2
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• pp.115-125
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• 2007

The ubiquitous embedded computers are firmly established as the basic electronic component of design that control military systems. Such applications can be found everywhere in the field of military system. A embedded computer is required to redesign when system needs performance upgrade or production-state of processor is NRND or EOL. This paper describes a scheme about impact analysis of designing processor alteration on embedded computer. In this case, hardware architecture and interrupt source of target system must be considered. Also, performance and throughput of that must be analyzed.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.10
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• pp.1545-1552
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• 2013

This paper presents an implementation of embedded platform based ARM A8-cortex processor for android supporting. The development board for S5PV210 is a platform that is suitable for code development of SAMSUNG's S5PV210 32bit RICS micro controller(ARMv7) architecture for hand-held device and general applications. Embedded platform development board offers various function and high efficiencies. In addition to the high performance, the embedded platform offers low current consumption, ensuring low costs and power.

• Journal of KIISE:Computing Practices and Letters
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• v.14 no.4
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• pp.369-377
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• 2008

Today, Ethernet technology is rapidly developing to have a bandwidth of 10Gbps beyond 1Gbps. In such high-speed networks, the existing method that host CPU processes TCP/IP in the operating system causes numerous overheads. As a result of the overheads, user applications cannot get the enough computing power from the host CPU. To solve this problem, the TCP/IP Offload Engine(TOE) technology was emerged. TOE is a specialized NIC which processes the TCP/IP instead of the host CPU. In this paper, we implemented a high-performance, lightweight TCP/IP(HL-TCP) for the TOE and applied it to an embedded system. The HL-TCP supports existing fundamental TCP/IP functions; flow control, congestion control, retransmission, delayed ACK, processing out-of-order packets. And it was implemented to utilize Ethernet MAC's hardware features such as TCP segmentation offload(TSO), checksum offload(CSO) and interrupt coalescing. Also we eliminated the copy overhead from the host memory to the NIC memory when sending data and we implemented an efficient DMA mechanism for the TCP retransmission. The TOE using the HL-TCP has the CPU utilization of less than 6% and the bandwidth of 453Mbps.

• Proceedings of the IEEK Conference
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• 2003.11a
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• pp.99-102
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• 2003

Computing environments of Embedded Systems are different from those of desktop computers so that they have resource constraints such as CPU processing, memory capacity, power, and etc.. Thus, when a desktop S/W is ported into embedded systems, optimization should be seriously considered. In this paper, we investigate several S/W optimization techniques to be considered for porting H.263 encoder into a high performance DSP, TMS320C6711. Through experiments, it is found that optimization techniques employed can make a big performance improvement.

• IEMEK Journal of Embedded Systems and Applications
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• v.15 no.6
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• pp.299-305
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• 2020

We have developed a scheduler that additionally consider network performance by extending the Kubernetes developed to manage lots of containers in cloud computing nodes. The network delay adapt characteristics of the compute nodes were learned during server operation and the learned results were utilized to develop placement algorithm by considering the existing measurement units, CPU, memory, and volume together, and it was confirmed that the low delay network service was provided through placement algorithm.

• Proceedings of the Korean Information Science Society Conference
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• 1998.10a
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• pp.18-20
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• 1998

본 논문에서는 RISC Microprocessor Core 설계에 대한 기반 기술을 확립하여, GPS(Global Positioning System) 같은 Embedded 시스템 등에서 주로 사용되어 지고 있는 ARM사의 ARM7 CPU와 이진 호환이 가능한 Microprocessor를 설계하고자 하였다. 이를 위하여 RISC Microprocessor의 기본적인 구조를 바탕으로 하여 ARM7 CPU와의 호환을 위하여 ARM7 CPU의 명령어들이 주어진 Clock안에 수행될 수 있도록 설계를 하였고, 여러 모듈을 원활히 공유할 수 있도록 내부에 공유 버스를 설계하였다. 설계를 위해서 Verilog-HDL(Hardware Description Language)을 사용하였으며, Microprocessor를 기술하는데 있어서 Behavioral 구조와 RTL(Register Transfer Level) 구조를 혼합하여 사용하였다. 설계된 Microprocessor의 동작은 면적과 타이밍의 최적화를 거친 후 Cwaves 툴을 사용하여 실질적인 ARM7의 명령어들을 수행하면서 검증하였다.

• Proceedings of the Korea Information Processing Society Conference
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• 2011.11a
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• pp.66-68
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• 2011

낮은 오버헤드를 갖는 실시간 스케줄링 알고리즘은 멀티코어 프로세서가 임베디드 시스템에서 사용되기 위한 가장 중요한 요소 중의 하나이다. 멀티코어 환경에서 스케줄링 오버헤드는 주로 메모리 성능을 저해시키는 코어간 태스크 이동에 의해 발생한다. 본 논문에서는 시스템 이용률 면에서 최적으로 알려진 Pfair 스케줄링 알고리즘을 스케줄링 시에 태스크의 CPU 코어 할당 방식에 대해 스케줄링 오버헤드를 측정하였다. 실험 결과 동일 코어 기반 태스크 할당 방식을 도입함으로 인해서 태스크 이동 횟수를 크게 줄일 수 있음을 보여주었다.