• Title/Summary/Keyword: Electroplating device

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Microdevice for Separation of Circulating Tumor Cells Using Embedded Magnetophoresis with V-shaped Ni-Co Nanowires and Immuno-nanomagnetic Beads

  • Park, Jeong Won;Lee, Nae-Rym;Cho, Sung Mok;Jung, Moon Youn;Ihm, Chunhwa;Lee, Dae-Sik
    • ETRI Journal
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    • v.37 no.2
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    • pp.233-240
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    • 2015
  • The novelty of this study resides in a 6"-wafer-level microfabrication protocol for a microdevice with a fluidic control system for the separation of circulating tumor cells (CTCs) from human whole blood cells. The microdevice utilizes a lateral magnetophoresis method based on immunomagnetic nanobeads with anti-epithelial cell adhesive molecule antibodies that selectively bind to epithelial cancer cells. The device consists of a top polydimethylsiloxane substrate for microfluidic control and a bottom substrate for lateral magnetophoretic force generation with embedded v-shaped soft magnetic microwires. The microdevice can isolate about 93% of the spiked cancer cells (MCF-7, a breast cancer cell line) at a flow rate of 40/100 mL/min with respect to a whole human blood/buffer solution. For all isolation, it takes only 10 min to process 400 mL of whole human blood. The fabrication method is sufficiently simple and easy, allowing the microdevice to be a mass-producible clinical tool for cancer diagnosis, prognosis, and personalized medicine.

Temperature-dependent DC Characteristics of Homojunction InGaAs vertical Fin TFETs (동종 접합 InGaAs 수직형 Fin TFET의 온도 의존 DC 특성에 대한 연구)

  • Baek, Ji-Min;Kim, Dae-Hyun
    • Journal of Sensor Science and Technology
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    • v.29 no.4
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    • pp.275-278
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    • 2020
  • In this study, we evaluated the temperature-dependent characteristics of homojunction InGaAs vertical Fin-shaped Tunnel Field-Effect Transistors (Fin TFETs), which were fabricated using a novel nano-fin patterning technique in which the Au electroplating and the high-temperature InGaAs dry-etching processes were combined. The fabricated homojunction InGaAs vertical Fin TFETs, with a fin width and gate length of 60 nm and 100 nm, respectively, exhibited excellent device characteristics, such as a minimum subthreshold swing of 80 mV/decade for drain voltage (VDS) = 0.3 V at 300 K. We also analyzed the temperature-dependent characteristics of the fabricated TFETs and confirmed that the on-state characteristics were insensitive to temperature variations. From 77 K to 300 K, the subthreshold swing at gate voltage (VGS) = threshold voltage (VT), and it was constant at 115 mV/decade, thereby indicating that the conduction mechanism through band-to-band tunneling influenced the on-state characteristics of the devices.

Critical Cleaning Requirements for Back End Wafer Bumping Processes

  • Bixenman, Mike
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2000.04a
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    • pp.57-64
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    • 2000
  • As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology fur their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electrodes nickel, solder jetting, stud bumping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.

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Critical Cleaning Requirements for Back End Wafer Bumping Processes

  • Bixenman, Mike
    • Journal of the Microelectronics and Packaging Society
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    • v.7 no.1
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    • pp.51-59
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    • 2000
  • As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology for their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electroless nickel, solder jetting, stud humping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. Research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.

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Electromagnetic Micro x-y Stage for Probe-Based Data Storage

  • Park, Jae-joon;Park, Hongsik;Kim, Kyu-Yong;Jeon, Jong-Up
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.1 no.1
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    • pp.84-93
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    • 2001
  • An electromagnetic micro x-y stage for probe-based data storage (PDS) has been fabricated. The x-y stage consists of a silicon body inside which planar copper coils are embedded, a glass substrate bonded to the silicon body, and eight permanent magnets. The dimensions of flexures and copper coils were determined to yield $100{\;}\mu\textrm{m}$ in x and y directions under 50 mA of supplied current and to have 440 Hz of natural frequency. For the application to PDS devices, electromagnetic stage should have flat top surface for the prevention of its interference with multi-probe array, and have coils with low resistance for low power consumption. In order to satisfy these design criteria, conducting planar copper coils have been electroplated within silicon trenches which have high aspect ratio ($5{\;}\mu\textrm{m}$in width and $30{\;}\mu\textrm{m}$in depth). Silicon flexures with a height of $250{\;}\mu\textrm{m}$ were fabricated by using inductively coupled plasma reactive ion etching (ICP-RIE). The characteristics of a fabricated electromagnetic stage were measured by using laser doppler vibrometer (LDV) and dynamic signal analyzer (DSA). The DC gain was $0.16{\;}\mu\textrm{m}/mA$ and the maximum displacement was $42{\;}\mu\textrm{m}$ at a current of 180 mA. The measured natural frequency of the lowest mode was 325 Hz. Compared with the designed values, the lower natural frequency and DC gain of the fabricated device are due to the reverse-tapered ICP-RIE process and the incomplete assembly of the upper-sided permanent magnets for LDV measurements.

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Fabrication and Evaluation of Machinability of Diamond Particle Electroplating Tool for Cover-Glass Edge Machining (커버 글래스 엣지 가공을 위한 다이아몬드 입자 전착 공구 제작 및 가공성 평가)

  • Kim, Byung-Chan;Yoon, Ho-Sub;Cho, Myeong-Woo
    • Design & Manufacturing
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    • v.11 no.1
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    • pp.1-6
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    • 2017
  • In these days, due to generalization of using smart mobile phone and wearable device such as smart watch, demand of Cover-glass and touch screen panel for protecting display increases. With increasing the demand of Cover-glass, slimming technique is promising for weight lightening, zero bezel. Cover-glass produced by this technique is required to decreasing thickness with increase strength. In the Cover-glass manufacturing process, mechanical processing and chemical processing has improve in the strength. Generally, Diamond electrodeposition wheel is used in mechanical process. Reinforced glass with the characteristics of the brittle and high hardness was manufactured by using a diamond electrodeposition wheel. At this time, Because of surface of the tool present non-uniform distribution of diamond particle, it has generate Loading of wheel and it has been decrease life of grinding tool, efficiency of grinding, quality and shape accuracy of workpiece. Thus Research is needed to controling particle distribution of diamond electrodeposition wheel uniformly. And it is necessary to study micro hole machining such as proximity senser hole, speaker hole positioned Cover-glass. Reinforced glass with the characteristics of the brittle and high hardness is difficult to machining. Processing of reinforced glass have generated wear of tool, micro cracks. Also, it is decreasing shape accuracy. In this paper, We conducted a study on how to control particle distribution uniformly about the diamond tool manufactured using elecetodeposition processing. It analyzed the factors that affect the arrangement of the particles in the electrodeposition process by design of experiment. And There is produced the grinding tool, which derives an optimum deposition conditions, for processing Cover-glass edge and the machinability was evaluated.

A Study on the Fabrication and High Frequency Characteristics of Close type Magnetic Planar Inductor (폐자로형 평면 인덕터의 제조 및 고주파 특성에 관한 연구)

  • 이창호;신동훈;남승의;김형준
    • Journal of the Korean Magnetics Society
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    • v.8 no.4
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    • pp.241-248
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    • 1998
  • In accordance with tendency to miniaturization and high frequency operation of electronic products, extensive efforts of miniaturizing magnetic devices such as inductors, transformers and magnetic sensors are being made. In order to study on fabrication and characteristic of micro-magnetic devices, we carried out two sets of experiments. One is to develop a magnetic film that is suitable for high frequency operation, and the other is to develop the fabrication processes for realizing the micro-coil with meander shape. Magnetic films were composed of FeTa(N,C) fabricated by DC magnetron sputtering system. Their microstructures were nanocrystalline structure and magnetic properties showed Bs:13~17 kG, Hc:0.1~0.2 Oe and $\mu$':2000~4000. Cu coil pattern fabricated by selective electroplating process showed good electrical conductivity. In the case of air core inductors, inductance (L) of 50 nH, resonance frequency $(f_R)$ of 700 MHz, and quality factor (Q) of 30 at 200 MHz could be obtained. In the case of close type magnetic inductors, inductance (L) of 150 nH, resonance frequency $(f_R)$ of 100 MHz, and quality factor (Q) of 4 at 10~30 MHz could be obtained.

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Flexible InGaP/GaAs Double-Junction Solar Cells Transferred onto Thin Metal Film (InGaP/GaAs 이중접합 기반의 고효율 플렉시블 태양전지 제조기술 연구)

  • Moon, Seungpil;Kim, Youngjo;Kim, Kangho;Kim, Chang Zoo;Jung, Sang Hyun;Shin, Hyun-Beom;Park, Kyung Ho;Park, Won-Kyu;Ahn, Yeon-Shik;Kang, Ho Kwan
    • Current Photovoltaic Research
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    • v.4 no.3
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    • pp.108-113
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    • 2016
  • III-V compound semiconductor based thin film solar cells promise relatively higher power conversion efficiencies and better device reliability. In general, the thin film III-V solar cells are fabricated by an epitaxial lift-off process, which requires an $Al_xGa_{1-x}As$ ($x{\geq}0.8$) sacrificial layer and an inverted solar cell structure. However, the device performance of the inversely grown solar cell could be degraded due to the different internal diffusion conditions. In this study, InGaP/GaAs double-junction solar cells are inversely grown by MOCVD on GaAs (100) substrates. The thickness of the GaAs base layer is reduced to minimize the thermal budget during the growth. A wide band gap p-AlGaAs/n-InGaP tunnel junction structure is employed to connect the two subcells with minimal electrical loss. The solar cell structures are transferred on to thin metal films formed by Au electroplating. An AlAs layer with a thickness of 20 nm is used as a sacrificial layer, which is removed by a HF:Acetone (1:1) solution during the epitaxial lift-off process. As a result, the flexible InGaP/GaAs solar cell was fabricated successfully with an efficiency of 27.79% under AM1.5G illumination. The efficiency was kept at almost the same value after bending tests of 1,000 cycles with a radius of curvature of 10 mm.

Thermoelectric Characteristics of the Electroplated Bi-Te Films and Photoresist Process for Fabrication of Micro Thermoelectric Devices (전기도금 공정으로 제조한 Bi-Te 박막의 열전특성 및 미세열전소자 형성용 포토레지스트 공정)

  • Lee, Kwang-Yong;Oh, Tae-Sung
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.2 s.43
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    • pp.9-15
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    • 2007
  • Thermoelectric properties of the electrodeposited Bi-Te films and photoresist process have been investigated to apply for thermoelectric thin film devices. After plating in Bi-Te solutions of 20 mM concentration, which were prepared by dissolving $Bi_2O_3$ and $TeO_2$ into 1M $HNO_3$, thermoelectric properties of the films were characterized with variation of the Te/(Bi+Te) ratio in a plating solution. With increasing the Te/(Bi+Te) ratio in the plating solution from 0.5 to 0.65, Seebeck coefficient of Bi-Te films changed from $-59{\mu}V/K$ to $-48{\mu}V/K$ and electrical resistivity was lowered from $1m{\Omega}-cm$ to $0.8m{\Omega}-cm$ due to the increase in the electron concentration. Maximum power factor of $3.5{\times}10^{-4}W/K^2-m$ was obtained for the Bi-Te film with the $Bi_2Te_3$ stoichiometric composition. Using multilayer overhang process, the photoresist pattern to form thermoelectric legs of 30 m depth and 100m diameter was successfully fabricated fur micro thermoelectric device applications.

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Effects of Leveler on the Trench Filling during Damascene Copper Plating (전해전착시 상감 구리 배선의 충전에 미치는 레벨러의 효과)

  • Lee, Yu-Young;Park, Young-Joon;Lee, Jae-Bong;Cho, Byung-Won
    • Journal of the Korean Electrochemical Society
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    • v.5 no.3
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    • pp.153-158
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    • 2002
  • The effects of leveler on the copper trench filling were investigated during damascene plating process. To investigate the trench filling effect with the addition of a leveler, a cross-section images of the electroplated trenches with the width of$0.37{\mu}m,\;and\;0.18{\mu}m$ were observed by field emission scanning electron microscope (FE-SEM). Polyethylene glycol(PEG), 3-mercapto-1-propanesulfonic acid and Janus Green B were used as a carrier, an accelerator and a leveler. $0.37{\mu}m$ trenches were superfilled without voids, but there was voids formation in $0.18{\mu}m$ trenches when the leveler was not added into the electrolyte. On the other hand $0.18{\mu}m$ trenches were superfilled without voids with the addition of the leveler due to the reduction growth rate of copper at protrusions and edges, which yield smooth final deposit surface. The leverer effect becomes more significant as the width of trenches becomes smaller when trenches are filed.