• Title/Summary/Keyword: Electronics Units

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Exploring reward efficacy in traffic management using deep reinforcement learning in intelligent transportation system

  • Paul, Ananya;Mitra, Sulata
    • ETRI Journal
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    • v.44 no.2
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    • pp.194-207
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    • 2022
  • In the last decade, substantial progress has been achieved in intelligent traffic control technologies to overcome consistent difficulties of traffic congestion and its adverse effect on smart cities. Edge computing is one such advanced progress facilitating real-time data transmission among vehicles and roadside units to mitigate congestion. An edge computing-based deep reinforcement learning system is demonstrated in this study that appropriately designs a multiobjective reward function for optimizing different objectives. The system seeks to overcome the challenge of evaluating actions with a simple numerical reward. The selection of reward functions has a significant impact on agents' ability to acquire the ideal behavior for managing multiple traffic signals in a large-scale road network. To ascertain effective reward functions, the agent is trained withusing the proximal policy optimization method in several deep neural network models, including the state-of-the-art transformer network. The system is verified using both hypothetical scenarios and real-world traffic maps. The comprehensive simulation outcomes demonstrate the potency of the suggested reward functions.

Taxi-demand forecasting using dynamic spatiotemporal analysis

  • Gangrade, Akshata;Pratyush, Pawel;Hajela, Gaurav
    • ETRI Journal
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    • v.44 no.4
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    • pp.624-640
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    • 2022
  • Taxi-demand forecasting and hotspot prediction can be critical in reducing response times and designing a cost effective online taxi-booking model. Taxi demand in a region can be predicted by considering the past demand accumulated in that region over a span of time. However, other covariates-like neighborhood influence, sociodemographic parameters, and point-of-interest data-may also influence the spatiotemporal variation of demand. To study the effects of these covariates, in this paper, we propose three models that consider different covariates in order to select a set of independent variables. These models predict taxi demand in spatial units for a given temporal resolution using linear and ensemble regression. We eventually combine the characteristics (covariates) of each of these models to propose a robust forecasting framework which we call the combined covariates model (CCM). Experimental results show that the CCM performs better than the other models proposed in this paper.

Implementation of handwritten digit recognition CNN structure using GPGPU and Combined Layer (GPGPU와 Combined Layer를 이용한 필기체 숫자인식 CNN구조 구현)

  • Lee, Sangil;Nam, Kihun;Jung, Jun Mo
    • The Journal of the Convergence on Culture Technology
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    • v.3 no.4
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    • pp.165-169
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    • 2017
  • CNN(Convolutional Nerual Network) is one of the algorithms that show superior performance in image recognition and classification among machine learning algorithms. CNN is simple, but it has a large amount of computation and it takes a lot of time. Consequently, in this paper we performed an parallel processing unit for the convolution layer, pooling layer and the fully connected layer, which consumes a lot of handling time in the process of CNN, through the SIMT(Single Instruction Multiple Thread)'s structure of GPGPU(General-Purpose computing on Graphics Processing Units).And we also expect to improve performance by reducing the number of memory accesses and directly using the output of convolution layer not storing it in pooling layer. In this paper, we use MNIST dataset to verify this experiment and confirm that the proposed CNN structure is 12.38% better than existing structure.

Design of Low Cost H.264/AVC Entropy Coding Unit Using Code Table Pattern Analysis (코드 테이블 패턴 분석을 통한 저비용 H.264/AVC 엔트로피 코딩 유닛 설계)

  • Song, Sehyun;Kim, Kichul
    • Journal of IKEEE
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    • v.17 no.3
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    • pp.352-359
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    • 2013
  • This paper proposes an entropy coding unit for H.264/AVC baseline profile. Entropy coding requires code tables for macroblock encoding. There are patterns in codewords of each code tables. In this paper, the patterns between codewords are analyzed to reduce the hardware cost. The entropy coding unit consists of Exp-Golomb unit and CAVLC unit. The Exp-Golomb unit can process five code types in a single unit. It can perform Exp-Golomb processing using only two adders. While typical CAVLC units use various code tables which require large amounts of resources, the sizes of the tables are reduced to about 40% or less of typical CAVLC units using relationships between table elements in the proposed CAVLC unit. After the Exp-Golomb unit and the CAVLC unit generate code values, the entropy unit uses a small size shifter for bit-stream generation while typical methods are barrel shifters.

Hybrid phishing site detection system with GRU-based shortened URL determination technique (GRU 기반 단축 URL 판별 기법을 적용한 하이브리드 피싱 사이트 탐지 시스템)

  • Hae-Soo Kim;Mi-Hui Kim
    • Journal of IKEEE
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    • v.27 no.3
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    • pp.213-219
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    • 2023
  • According to statistics from the National Police Agency, smishing crimes using texts or messengers have increased dramatically since COVID-19. In addition, most of the cases of impersonation of public institutions reported to agency were related to vaccination and reward, and many methods were used to trick people into clicking on fake URLs (Uniform Resource Locators). When detecting them, URL-based detection methods cannot detect them properly if the information of the URL is hidden, and content-based detection methods are slow and use a lot of resources. In this paper, we propose a system for URL-based detection using transformer for regular URLs and content-based detection using XGBoost for shortened URLs through the process of determining shortened URLs using GRU(Gated Recurrent Units). The F1-Score of the proposed detection system was 94.86, and its average processing time was 5.4 seconds.

CGRA Compilation Boost up for Acceleration of Graphics (영상처리 가속을 위한 CGRA compilation 속도 향상)

  • Kim, Wonsub;Choi, Yoonseo;Kim, Jaehyun
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2014.06a
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    • pp.166-168
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    • 2014
  • Coarse-grained reconfigurable architectures (CGRAs) present a potential of high compute throughput with energy efficiency. A CGRA consists of an array of functional units (FU), which communicate with each other through an interconnect network containing transmission nodes and register files. To achieve high performance from the software solutions mapped onto CGRAs, modulo scheduling of loops is generally employed. One of the key challenges in modulo scheduling for CGRAs is to explicitly handle routings of operands from a source to a destination operations through various routing resources. Existing modulo schedulers for CGRAs are slow because finding a valid routing is generally a searching problem over a large space, even with the guidance of well-defined cost metrics. Applications in traditional embedded multimedia domains are regarded relatively tolerant to a slow compile time in exchange of a high quality solution. However, many rapidly growing domains of applications, such as 3D graphics, require a fast compilation. Entrances of CGRAs to these domains have been blocked mainly due to its long compile time. We attack this problem by utilizing patternized routes, for which resources and time slots for a success can be estimated in advance when a source operation is placed. By conservatively reserving predefined resources at predefined time slots, future routings originated from the source operation are guaranteed. Experiments on a real-world 3D graphics benchmark suite show that our scheduler improves the compile time up to 6000 times while achieving average 70% throughputs of the state-of-art CGRA modulo scheduler, edge-centric modulo scheduler (EMS).

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Developed of Smart Phone Charge System and Data Analysis for Efficient Solar Module Arrangement (효율적인 태양광 모듈 배치를 위한 데이터 분석 및 스마트폰 충전 시스템 개발)

  • Jang, Won-chang;Jeon, Min-ho;Lee, Myung-Eui
    • Journal of Advanced Navigation Technology
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    • v.20 no.1
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    • pp.86-92
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    • 2016
  • Recently, solar module is installed in crowded areas to offers services so that people can charge their smartphones or tablets. However, the burden in terms of cost is high to install in areas where utilization ratio is low and installation is difficult in limited spaces. In this paper, a system for collecting and providing the optical power is proposed from the analysis about the person that receives service in each area using the real-time data provided by the state and collected from the actual environment as well as considering the waiting time and the solar charging time in different environments. As a result, This study shows that charge was not delayed since collecting power exceeds charging power. Smartphone was fully charged in ninety-five minutes. we confirmed that with one smartphone, it can be charged a approximately fifty percent of the battery in between ten to twenty minutes, with multiple units they can be charged a approximately twenty percent of the battery in between ten to twenty minutes.

Efficient VLSI Architectures for the Two-Dimensional Discrete Wavelet Transform (2차원 이산 웨이브렛 변환을 위한 효율적인 VLSI 구조)

  • Pan, Sung-Bum;Park, Rae-Hong;Jee, Yong
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.37 no.1
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    • pp.59-68
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    • 2000
  • This paper proposes efficient VLSI architectures for computation of the 2- D discrete wavelet transform (DWT). The two proposed VLSI architectures for the 2- D DWT are constructed based on block-based computation Each $M{\times}N$ ($N{\times}M$) block DWT is performed along the row (column) direction simultaneously, where M and N denote the number of filter taps and the number of columns (rows), respectively The proposed architectures compute the lowpass and highpass output sequences of the 1 - DWT along the row and column directions using a single architecture In alternate clock cycles Therefore the extra processing units required for the proposed architectures are much smaller than those of the conventional architectures They are modeled In very high speed Integrated circuit hardware description language (HIDL) and Simulated to show their functional validity.

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The suppression of noise-induced speech distortions for speech recognition (음성인식을 위한 잡음하의 음성왜곡제거)

  • Chi, Sang-Mun;Oh, Yung-Hwan
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.35S no.12
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    • pp.93-102
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    • 1998
  • In noisy environments, human speech productions are influenced by noises(Lombard effect), and speech signals are contaminated. These distortions dramatically reduce the performance of speech recognition systems. This paper proposes a method of the Lombard effect compensation and noise suppression in order to improve speech recognition performance in noise environments. To estimate the intensity of the Lombard effect which is a nonlinear distortion depending on the ambient noise levels, speakers, and phonetic units, we formulate the measure of the Lombard effect level based on the acoustic speech signal, and the measure is used to compensate the Lombard effect. The distortions of speech under noisy environments are cancelled out as follows. First, spectral subtraction and band-pass filtering are used to cancel out noise. Second, energy nomalization is proposed to cancel out the variation of vocal intensity by the Lombard effect. Finally, the Lombard effect level controls the transform which converts Lombard speech cepstrum to clean speech cepstrum. The proposed method was validated on 50 korean word recognition. Average recognition rates were 82.6%, 95.7%, 97.6% with the proposed method, while 46.3%, 75.5%, 87.4% without any compensation at SNR 0, 10, 20 dB, respectively.

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A Study on HILS System for Virtual Distribution System Using LabVIEW (LabVIEW를 이용한 가상 배전계통의 HILS 시스템 구축에 관한 연구)

  • Lee, Won-Seok;Hwang, Seon-Hwan;Kim, Tae-Seong
    • Journal of IKEEE
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    • v.24 no.2
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    • pp.385-391
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    • 2020
  • Overcurrent and abnormal voltages in the distribution system can cause not only burden of power plant but also damage to customers. As a result, researches related to the distribution automation have been widely conducted by utilizing a real time digital simulation to improve the reliability of power supply through rapid failure handing, reduction of power failure intervals and failure recovery. However, the distribution automation systems using the real time digital simulator are expensive and limited to verify actual hardwares. Therefore, in this paper, an external hardware devices was developed based on the distribution system analysis results of the digital simulator. And real-time simulation and functional verification are implemented by the real feeder remote terminal units used in distribution automation. The effectiveness of the proposed system is verified through several experiments.