• Transactions of Materials Processing
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• 제23권4호
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• pp.206-210
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• 2014

The metal lead frame, a semiconductor component, has product tolerances in micro units as compared to products made with a larger size mold. Therefore, small deflections of the mold and of the press as well as the press molding process itself have a strong influence on accuracy of the product. Hence, it is necessary for the process design to consider the structural response of the mold and the press during deformation. In the current study, the mold deflection and pressure on the punch is examined using the finite element modeling (FEM) program ABAQUS. The results from the simulation were verified with the dynamic deformation measurement equipment using digital image correlation (DIC).

• Journal of IKEEE
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• 제19권1호
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• pp.80-86
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• 2015

There are many studies and products using a test paper impregnated with chemical solution can react with ozone. The color of a test paper can indicate the concentration of ozone. The purpose of this research is to design and manufacture a system using ultraviolet light source to measure the ozone density. This new technique is based on the characteristic of decomposition from ozone into oxygen under ultraviolet light. We used two sources of ultraviolet light including UV lamp and UVLED to determine the decomposition of ozone. This system is built with the electronic components, sensors and sealed pump tube to measure the ozone density in units of $g/cm^3$,ppm,ppb. In this paper,, we present some initial results of measuring the ozone density from ozone generator after completing inspection for safety.

• Proceedings of the IEEK Conference
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• 대한전자공학회 2002년도 ITC-CSCC -3
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• pp.1768-1771
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• 2002

Automatic Transmission System(ATS) was designed to replace the human's manual operation of the gear box. So far, this system operates with the fixed shift pattern information. In this paper, new algorithm considering driver's operation tendency is proposed. Also, to get rid of the uselessly frequent shift of the ATS, the conditions and the status of the vehicle would be included for the evaluation in making a decision of shifting. A field test is done in a car equipped with the computer set connected to Transmission Control Units(TCU) to check the status of the test car, and it shows the excellency of the proposed algorithm.

• Current Optics and Photonics
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• 제5권6호
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• pp.617-626
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• 2021

A parallel Monte Carlo photon migration algorithm for graphics processing units that implements an improved load-balancing strategy is presented. Conventional parallel Monte Carlo photon migration algorithms suffer from a computational bottleneck due to their reliance on a simple load-balancing strategy that does not take into account the different length of the mean free paths of the photons. In this paper, path-partition load balancing is proposed to eliminate this computational bottleneck based on a mathematical formula that parallelizes the photon path tracing process, which has previously been considered non-parallelizable. The performance of the proposed algorithm is tested using three-dimensional photon migration simulations of a human skin model.

• Journal of Power Electronics
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• 제11권3호
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• pp.271-278
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• 2011

This paper presents a LLC resonant controller IC for secondary side control without external active devices to achieve low profile and low cost LED back light units. A gate driving transformer is adopted to isolate the primary side and the secondary side instead of an opto-coupler. A new integrated dimming circuitry is proposed to improve the dynamic current control characteristic and the current density of a LED for the brightness modulation of a large screen LCD. A dual-slope clock generator is proposed to overcome the frequency error due to the under shoot in conventional approaches. This chip is fabricated using 0.35 ${\mu}m$ BCD technology and the die size is $2{\times}2\;mm^2$. The frequency range of the clock generator is from 50 kHz to 500 kHz and the range of the dead time is from 50 ns to 2.2 ${\mu}s$. The efficiency of the LED driving circuit is 97 % and the current consumption is 40 mA for a 100 kHz operation frequency from a 15 V supply voltage.

• ETRI Journal
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• 제30권3호
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• pp.365-376
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• 2008

This paper presents the design and implementation of a hyperelliptic curve cryptography (HECC) coprocessor over affine and projective coordinates, along with measurements of its performance, hardware complexity, and power consumption. We applied several design techniques, including parallelism, pipelining, and loop unrolling, in designing field arithmetic units, group operation units, and scalar multiplication units to improve the performance and power consumption. Our affine and projective coordinate-based HECC processors execute in 0.436 ms and 0.531 ms, respectively, based on the underlying field GF($2^{89}$). These results are about five times faster than those for previous hardware implementations and at least 13 times better in terms of area-time products. Further results suggest that neither case is superior to the other when considering the hardware complexity and performance. The characteristics of our proposed HECC coprocessor show that it is applicable to high-speed network applications as well as resource-constrained environments, such as PDAs, smart cards, and so on.

• 한국전산유체공학회:학술대회논문집
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• 한국전산유체공학회 2010년 춘계학술대회논문집
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• pp.416-421
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• 2010

The north and south panel of a geostationary satellite are used for radiator panels to reject internal heat dissipation of electronics units and utilize several heat pipe networks to control the temperatures of units and the satellite within proper ranges. The design of these panels is very important and essential at the conceptual design and preliminary design stage so several thousands of nodes of more are utilized in order to perform thermal analysis of panel. Generating a large number of nodes(meshes) of the panel takes time and is tedious work because the mesh can be easily changed and updated by locations of units and heat pipes. Also the detailed panel model can not be integrated into spacecraft thermal model due to its node size and limitation of commercial satellite thermal analysis program. Thus development of a program was required in order to generate detailed panel model, to perform thermal analysis and to make a reduced panel model for the integration to the satellite thermal model. This paper describes the development and the verification of panel thermal analysis program with ist main modules and its main functions.

• Advances in materials Research
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• 제2권4호
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• pp.181-193
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• 2013

Description and theory of spin coating technique has been elaborately outlined and a spin coating machine designed and fabricated using affordable components. The system was easily built with interdisciplinary knowledge of mechanics, fluid mechanics and electronics. This equipment employs majorly three basic components and two circuit units in its operation. These include a high speed dc motor, a proximity sensor mounted at a distance of about 15 mm from a reflective metal attached to the spindle of the motor to detect every passage of the reflective metal at its front and generate pulses. The pulses are transmitted to a micro-controller which process them into rotational speed (revolution per minute) and displays it on a lead crystal display (LCD) which is also a component of the micro-controller. The circuit units are a dc power supply unit and a PWM motor speed controlling unit. The various components and circuit units of this equipment are housed in a metal casing made of an 18 gauge black metal sheet designed with a total area of 1, $529.2cm^2$. To illustrate the use of the spin-coating system, ZnO sol-gel films were prepared and characterized using SEM, XRD, UV-vis, FT-IR and RBS and the result agrees well with that obtained from standard equipment and a speed of up to 9000 RPM has been achieved.

• IEIE Transactions on Smart Processing and Computing
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• 제4권2호
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• pp.71-77
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• 2015

Upcoming ground-breaking applications for always-on tiny interconnected devices steadily demand two-fold features of processor cores: aggressively low power consumption and enhanced performance. We propose implementation of a novel superscalar low-power processor core with a low supply voltage. The core implements intra-core low-power microarchitecture with minimal performance degradation in instruction fetch, branch prediction, scheduling, and execution units. The inter-core lockstep not only detects malfunctions during low-voltage operation but also carries out software-based recovery. The chip incorporates a pair of cores, high-speed memory, and peripheral interfaces to be implemented with a 65nm node. The processor core consumes only 24mW at 350MHz and 0.68V, resulting in power efficiency of $80{\mu}W/MHz$. The operating frequency of the core reaches 850MHz at 1.2V.

• ETRI Journal
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• 제30권2호
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• pp.301-307
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• 2008

As broadband access is evolving from digital subscriber lines to optical access networks, Ethernet passive optical networks (EPONs) are considered a promising solution for next generation broadband access. The point-to-multipoint topology of EPONs requires a time-division multiple access MAC protocol for upstream transmission. In this paper, we propose a new enhanced dynamic bandwidth allocation algorithm with fairness called EFDBA for multiple services over EPONs. The proposed algorithm is composed of a fairness counter controller and a fairness system buffer in the optical line terminal. The EFDBA algorithm with fairness can provide increased capability and efficient resource allocation in an EPON system. In the proposed EFDBA algorithm, the optical line termination allocates bandwidth to the optical network units in proportion to the fairness weighting counter number associated with their class and queue length. The proposed algorithm provides efficient resource utilization by reducing the unused remaining bandwidth made by idle state optical network units.