• Journal of Surface Science and Engineering
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• v.48 no.2
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• pp.38-42
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• 2015

Atomic layer deposition (ALD) is essential for the fabrication of nanoscale electronic devices because it has excellent conformality, atomic scale thickness control, and large area uniformity. Metal thin films are one of the important material components for electronic devices as a conductor. As the size of electronic devices shrinks, the thickness of metal thin films is decreased down to few nanometers, and the metal films become non-continuous due to inherent island growth of metal below a critical thickness. So, fabrication of continuous metal thin films by ALD is fundamentally and practically important. Since ALD films are grown through self-saturated reactions between precursors on surface, initial growth characteristics significantly depend on the surface properties and the selection of precursors. In this work, we investigated ALD Pt on $TiO_2$ substrate by using trimethyl-methyl-cyclopentadienyl-Platinum ($MeCpPtMe_3$) precursor and $O_3$ reactant. By using $O_3$ instead of $O_2$, initial nucleation rate of ALD Pt was increased on $TiO_2$ surface, resulting in formation of continuous thin Pt films. Morphologies of ALD Pt on $TiO_2$ were characterized by using Scanning Electron Microscope (SEM) and Energy-Dispersive X-ray Spectroscopy (EDS). Crystallinity of ALD Pt on $TiO_2$ correlated with its growth characteristics was analyzed by X-Ray Diffraction (XRD).

• Journal of the Korean Society of Safety
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• v.28 no.2
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• pp.26-30
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• 2013

The purpose of this study is to find risk factors by analyzing the operation principle of a photo coupler (P/C) used to remove the noise of electronic devices and establish a base for the performance improvement of developed products. It was found from the P/C circuit analysis of normal products that they were equipped with an electrolytic condenser of $0.1{\mu}F$ to smooth system signals. Due to the epoxy resin packing the external part of the P/C, this study experienced a limit to visually examine the damage to it. It could be seen from the analysis of electric characteristics of the P/C that the forward voltage ($V_f$) and reverse current ($I_r$) were 1.3 V and 10 uA, respectively. In addition, it is required that the breakdown voltage (VCE) between the collector (C) and emitter (E) be maintained at less than 35 V. The and of the damaged product #1 were comparatively good. However, the measurement of was 100.0 uA. From this, it is thought that a short circuit occurred to the internal circuit. Moreover, from the fact that the of the damaged product #2 was open circuit and the measurement of was 0.0 uA, it is thought that the collector and emitter was separated or insulation resistance was significantly high. Furthermore, from the fact that the of the damaged product #3 was open circuit and the measurement of was 0.0 uA, it is thought that the space between the collector (C) and emitter (E) failed to meet the design standard or that they were separated. Therefore, it is thought that fabricating the P/C by increasing the reverse current 10 mA to 50 mA will prevent its malfunction.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.15 no.4
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• pp.1850-1858
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• 2014

The object of this study is to develop an cooling control algorithm for electronics devices of the electric vehicle. In order to estimate the existing cooling control logic of the electronic devices for the small and medium sized electric vehicle, the experiments on the coolant temperature variation of the cooling system were conducted under 4 different seasons conditions. As a result, the existing cooling control logic were overcooled when it was compared with the reference temperature for a required cooling load. In addition, the newly developed optimum cooling control logic for improving the mileages of the tested electric vehicle with consideration of the ambient temperature, vehicle speed, and refrigerant temperature of the air conditioning on/off is necessary.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.426.2-426.2
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• 2016

Numerous of researches are being conducted to improve the efficiency of $Cu_2ZnSnSe_4$ (CZTSe)-based photovoltaic devices, which is one of the most promising candidates for low cost and environment-friendly solar cells. In this work, we concentrate on the back contact of the devices. A proper thickness of $MoSe_2$ in back contact structure is believed to enhance adhesion and ohmic contact between Mo back contact and absorber layer. Nevertheless, too thick $MoSe_2$ layers that are grown during high-temperature selenization process can impede the current collection, thus resulting in low cell performance. By applying molybdenum nitride as a barrier in back contact structure, we were able to control the thickness of $MoSe_2$ layer, which resulted in lower series resistance and higher fill factor of CZTSe devices. The phase transformation of Mo-N binary system was systematically studied by changing $N_2$ concentration during the sputtering process. With a proper phase of Mo-N fabricated by using an adequate partial pressure of $N_2$, the efficiency of CZTSe solar cells as high as 8.31% was achieved while the average efficiency was improved by about 2% with respect to that of the referent cells where no barrier layer was employed.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.194.1-194.1
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• 2015

Transition metal dichalcogenide (TMD) with layered structure, has recently been considered as promising candidate for next-generation flexible electronic and optoelectronic devices because of its superior electrical, optical, and mechanical properties.[1] Scalability of thickness down to a monolayer and van der Waals expitaxial structure without surface dangling bonds (consequently, native oxides) make TMD-based thin film transistors (TFTs) that are immune to the short channel effect (SCE) and provide very high field effect mobility (${\sim}200cm^2/V-sec$ that is comparable to the universal mobility of Si), respectively.[2] In addition, an excellent photo-detector with a wide spectral range from ultraviolet (UV) to close infrared (IR) is achievable with using $WSe_2$, since its energy bandgap varies between 1.2 eV (bulk) and 1.8 eV (monolayer), depending on layer thickness.[3] However, one of the critical issues that hinders the successful integration of $WSe_2$ electronic and optoelectronic devices is the lack of a reliable and controllable doping method. Such a component is essential for inducing a shift in the Fermi level, which subsequently enables wide modulations of its electrical and optical properties. In this work, we demonstrate n-doping method for $WSe_2$ on poly-4-vinylphenol and poly (melamine-co-formaldehyde) (PVP/PMF) insulating layer and adjust the doping level of $WSe_2$ by controlling concentration of PMF in the PVP/PMF layer. We investigated the doping of $WSe_2$ by PVP/PMF layer in terms of electronic and optoelectronic devices using Raman spectroscopy, electrical measurements, and optical measurements.

• Korean Journal of Materials Research
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• v.20 no.6
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• pp.294-300
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• 2010

In this study, we fabricated a polymer light emitting diode (PLED) and investigated its electrical and optical characteristics in order to examine the effects of the PFO [poly(9,9-dioctylfluorene-2-7-diyl) end capped with N,N-bis(4-methylphenyl)-4-aniline] concentrations in the emission layer (EML). The PFO polymer was dissolved in toluene ranging from 0.2 to 1.2 wt%, and then spin-coated. To verify the influence of the TPBI [2,2',2"-(1,3,5-Benzinetriyl)-tris(1-phenyl-1-H-benzimidazole)]electron transport layer, TPBI small molecules were deposited by thermal evaporation. The current density, luminance, wavelength and current efficiency characteristics of the prepared PLED devices with and without TPBI layer at various PFO concentrations were measured and compared. The luminance and current efficiency of the PLED devices without TPBI layer were increased, from 117 to $553\;cd/m^2$ and from 0.015 to 0.110 cd/A, as the PFO concentration increased from 0.2 to 1.0 wt%. For the PLED devices with TPBI layer, the luminance and current efficiency were $1724\;cd/m^2$ and 0.501 cd/A at 1.0 wt% PFO concentration. The CIE color coordinators of the PLED device with TPBI layer at 1.0 wt% PFO concentration showed a more pure blue color compared with the one without TPBI, and the CIE values varied from (x, y) = (0.21, 0.23) to (x, y) = (0.16, 0.11).

• Journal of Sensor Science and Technology
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• v.9 no.3
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• pp.177-181
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• 2000

The tunneling current is exponentially dependent on the separation gap between a pair of conductors. The detection of displacement can be, therefore, carried out by measurment of a variation in the tunneling current. In this experiment, we fabricated pyramid-type silicon tunneling devices in which a tunneling current flow between a micro-tip and $Si_3N_4$ thin film membrane. A MEMS process was used for the fabrication of the tunneling devices. The micro-tips were formed on Si wafers by undercutting a differently oriented square of $SiO_2$ with KOH. The stiffness of the $Si_3N_4$ films were observed and the model for the stiffness calculation, which is useful in predicting the stiffness even when the stiffness ranges beyond the scope of the normal experimental condition, was suggested.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1587_1588
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• 2009

In this paper, PCB embedded balanced-to-unbalamced duplexer using coupled LC resonator was introduced for low cost dualband WiMax front-end-module application. In order to obtain the function of bandpass filter and balun transformer, proposed duplexer was configured by using magnetically coupled LC resonator. Out-of-band suppression was enhanced by applying two m-Derived transform circuits to obtain transmission zeros at 2GHz and 4.8GHz. In order to reduce the size of embedded duplexer, BaSrTiO3 (BST) composite high Dk RCC film was applied to improve the capacitance density. This high Dk film provided the capacitance density of 12.2 pF/mm2. The simulation results shows that fabricated duplexer had an insertion loss of 2.9dB and 5.5dB and return loss of 15dB and 16dB for 2.5GHz~2.6GHz and 3.5GHz~3.6GHz, respectively. The maximum magnitude and phase imbalance were 0.01dB and 0.17dB, and 1degree and 2degree in its passband, respectively. The out-of-band suppression was observed approximately 29dB and 40dB below 1.9GHz and over 4.5GHz, respectively. It has a volume of 6 mm $\times$ 7 mm $\times$ 0.7 mm (height).

• Journal of Sensor Science and Technology
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• v.7 no.5
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• pp.300-305
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• 1998

In this paper, integrated pressure sensor with calibration of offset voltage and full scale output and temperature compensation of offset voltage and full scale output were designed. The signal conditioning circuitry are designed that calibrate the offset voltage and full scale output to desired values and minimize the temperature drift of offset voltage and full scale output. Designed circuits are simulated using SPICE in a bipolar technology. The ion implanted resistor of different temperature coefficient were used to trimming the desired values. As a results, offset voltage was calibrated to 0.133V and the temperature drift of offset voltage was reduced to $42\;ppm/^{\circ}C$. Also, the full scale output was calibrated to 4.65V and the temperature coefficient of full scale output was reduced to $40ppm/^{\circ}C$ after temperature compensation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.9
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• pp.7-13
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• 2010

In this paper, we proposed a processor architecture that is suitable for next generation embedded applications, especially for personal information devices such as smart phones, tablet PC. Latest high performance embedded processors are developed to achieve high clock speed. Because increasing performance makes design more difficult and induces large overhead, architectural evolution in embedded processor field is necessary. Among more enhanced processor types, out-of-order superscalar cannot be a candidate for embedded applications due to its excessive complexity and relatively low performance gain compared to its overhead. Therefore, new architecture with moderate complexity must be designed. In this paper, we developed a low-cost SMT architecture model and compared its performance to other architectures including scalar, superscalar and multiprocessor. Because current personal information devices have a tendency to execute multiple tasks simultaneously, SMT or CMP can be a good choice. And our simulation result shows that the efficiency of SMT is the best among the architectures considered.