• The KIPS Transactions:PartD
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• v.9D no.3
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• pp.477-486
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• 2002

vCard that is the electronic business card automates the exchange of personal information typically found on a traditional business card. vCard information contains not only simple text, but also graphics and multimedia data like pictures, company logos, Web addresses, and so on. This paper describes the design and implementation of Web-based vCard agent system for exchanging vCard, an electronic business card and searching another user's vCard in mobile phone environment. In today's business environment, such as that this information is typically exchanged on business cards. Our web agent system in this paper connect web server which provide vCard service and search, edit vCard information displayed by web browser of mobile phone and exchange vCard with another user through internet. Considering characteristics of wireless devices that have limited storage space, It also saves constructed XML documents that include user's informations in a web server and solves the security problem by exchanging not personal data or XML but encrypted directory name where XML document exits as exchanging vcard.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.523-524
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• 2007

This paper discusses the planarization process of thick copper film structure used for power supply device. Chemical mechanical polishing(CMP) has been used to remove a metal film and obtain a surface planarization which is essential for the semiconductor devices. For the thick metal removal, however, the long process time and other problems such as dishing, delamination and metal layer peeling are being issued, Compared to the traditional CMP process, Electro-chemical mechanical planarization(ECMP) is suggested to solve these problems. The two-step process composed of the ECMP and the conventional CMP is used for this experiment. The first step is the removal of several tens ${\mu}m$ of bulk copper on patterned wafer with ECMP process. The second step is the removal of residual copper layer aimed at a surface planarization. For more objective comparison, the traditional CMP was also performed. As an experimental result, total process time and process defects are extremely reduced by the two-step process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.94-95
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• 2007

In this paper, the dependence of electrical characteristics of Silicon-$Al_2O_3$-Nitride-Oxide-Silicon (SANOS) memory cell transistors and program speed, reliability of memory device on interface trap between Si substrate and tunneling oxide was investigated. The devices were fabricated by the identical processing in a single lot except the deposition method of the charge trapping layer, nitride. In the case of P/E speed, it was shown that P/E speed is slower in the SONOS cell transistors with larger interface trap density by charge blocking effect, which is confirmed by simulation results. However, the data retention characteristics show much less dependence on interface trap. Therefore, to improve SANOS memory characteristic, it is very important to optimize the interface trap and charge trapping layer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.398-398
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• 2007

The Liquid Crystal (LC) alignment uniformity is very important in LC devices. The alignment mechanism of LC molecules on a rubbed polyimide (PI) surface is very important for both LC fundamental research and application. So, Generally a rubbing method to align LC has been widely used to mass-produce LCD panels. But because rubbing method is contact method between rubbing fabric and indium-tin-oxide glass or flexible substrate, rubbing method has some defects, such as the electrode charges and the creation of contaminating particles. Thus we strongly recommend a non-contact alignment technique for getting rid of some defects of rubbing method. Most recently, the LC aligning capabilities achieved by ion-beam exposure on the organic and nonorganic thin film surface have been reported successfully. In this research, we studied the tilt angle generation and electro-optical performances for a NLC on homeotropic polyimide surfaces with ion-beam exposure. The LC aligning capabilities of a nematic liquid crystal (NLC) on a homeotropic PI surface using a new ion-beam method were studied. On the homeotropic PI surface, the tilt angle of the NLC by exposure ion-beam had a tendency to decrease as increased ion-beam energy density. And, on the homeotropic PI surface, the alignment character of the NLC with respect to ion-beam energy was good. And we achieved satisfactory result for EO character.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.96-96
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• 2007

Low voltage organic TFTs (OTFTs) and ZnO based TFTs (<5V), utilizing room temperature deposited $Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7$ (BZN) thin films were recently reported, pointing to high-k gate insulators as a promising route for realizing low voltage operating flexible electronics. $Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7$ (BZN) thin film is one of the most promising materials for gate insulator because of its large dielectric constant (~60) at room temperature. However their tendency to suffer from relatively high leakage current at low electric field (>0.3MV/cm) hinder the application of BZN thin films for gate insulator. In order to improve leakage current characteristics of BZN thin film, we mixed 30mol% MgO with 70mol% BZN and their dielectric and electric properties were characterized. We fabricated field-effect transistors with transparent oxide semiconductor ZnO serving as the electron channel and high-k $(Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7)_{0.7}(MgO)_{0.3}$ as the gate insulator. The devices exhibited low operation voltages (<4V) due to high capacitance of the $(Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7)_{0.7}(MgO)_{0.3}$ dielectric.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.33-33
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• 2007

In PDP industry, the dielectrics and barrier ribs have been required with low dielectric constant, low melting point and Pb-free composition due to the low power consumption, low signal delay time and the environment restriction. We were studied with $B_2O_3-Al_2O_3$-SrO glass systems about optical, thermal and dielectric properties. The glass forming region of the $B_2O_3-Al_2O_3$-SrO glass systems was narrow due to the amount of the glass former $(B_2O_3)$. The glass transition temperature (Tg) of the glasses was at $550{\sim}590^{\circ}C$. The glasses have 6~8 for the dielectric constant. Furthermore, the transmittance of the glasses was over 80% on the range of the visible ray. From the results, the glasses of the $B_2O_3-Al_2O_3$-SrO glass systems should enable to be a good candidate of the PDP devices for information display with low dielectric constant. The aim of this study is to give a fundamental result of new glass system for low dielectric constant in the information display.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.111-111
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• 2007

Further scaling the semiconductor devices down to low dozens of nanometer needs the extremely shallow depth in junction and the intentional counter-doping in the silicon gate. Conventional ion beam ion implantation has some disadvantages and limitations for the future applications. In order to solve them, therefore, plasma source ion implantation technique has been considered as a promising new method for the high throughputs at low energy and the fabrication of the ultra-shallow junctions. In this paper, we study about the effects of DC bias and base pressure as a process parameter. The diluted mixture gas (5% $PH_3/H_2$) was used as a precursor source and chamber is used for vacuum pressure conditions. After ion doping into the Si wafer(100), the samples were annealed via rapid thermal annealing, of which annealed temperature ranges above the $950^{\circ}C$. The junction depth, calculated at dose level of $1{\times}10^{18}/cm^3$, was measured by secondary ion mass spectroscopy(SIMS) and sheet resistance by contact and non-contact mode. Surface morphology of samples was analyzed by scanning electron microscopy. As a result, we could accomplish the process conditions better than in advance.

• Transactions on Electrical and Electronic Materials
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• v.18 no.3
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• pp.155-158
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• 2017

In this paper, ZnO Thin Film Transistors (TFTs) were fabricated by a sol-gel method using a low-temperature process, and their physical and electrical characteristics were analyzed. To lower the process temperature to $200^{\circ}C$, we used a zinc nitrate hydrate ($Zn(NO_3)_2{\cdot}xH_2O$) precursor. Thermo Gravimetric Analyzer (TGA) analysis showed that the zinc nitrate hydrate precursor solution had 1.5% residual organics, much less than the 6.5% of zinc acetate dihydrate at $200^{\circ}C$. In the sol-gel method, organic materials in the precursor disrupt formation of a high-quality film, and high-temperature annealing is needed to remove the organic residuals, which implies that, by using zinc nitrate hydrate, ZnO devices can be fabricated at a much lower temperature. Using an X-Ray Diffractometer (XRD) and an X-ray Photoelectron Spectrometer (XPS), $200^{\circ}C$ annealed ZnO film with zinc nitrate hydrate (ZnO (N)) was found to have an amorphous phase and much more oxygen vacancy ($V_o$) than Zn-O bonds. Despite no crystallinity, the ZnO (N) had conductance comparable to that of ZnO with zinc acetate dihydrate (ZnO (A)) annealed at $500^{\circ}C$ as in TFTs. These results show that sol-gel could be made a potent process for low-cost and flexible device applications by optimizing the precursors.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.1
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• pp.44-49
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• 2018

This study analyzed the Vulnerability of Network Communication devices when IEMI is coupled with the Network System. An Ultra Wide Band Generator (180 kV, 700 MHz) was used as the IEMI source. The EUTs are the Switch Hub and Workstation, which are used to configure the network system. The network system was monitored through the LAN system configuration, to confirm a malfunction of the network device. The results of the experiment indicate that a malfunction of the network occurs as the electric field increases. The data loss rate increases proportionally with increasing radiating time. In the case of the Switch Hub, the threshold electric field value was 10 kV/m for all conditions used in this experiment. The threshold point causing malfunction was influenced only by the electric field value. The correlation between the threshold point and pulse repetition rate was not found. However, in case of the Workstation, it was found that as the pulse repetition rate increases, the equipment responds weakly and the threshold value decreases. To verify the electrical coupling of the EUT by IEMI, current sensors were used to measure the PCB line inside the EUT and network line coupling current. As a result of the measurement, it can be inferred that when the coupling current due to IEMI exceeds the threshold value, it flows through the internal equipment line, causing a malfunction and subsequent failure. The results of this study can be applied to basic data for equipment protection, and effect analysis of intentional electromagnetic interference.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.6
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• pp.445-449
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• 2020

Non-volatile memory is approaching its fundamental limits with the Si₃N₄ storage layer, necessitating the use of alternative materials to achieve a higher programming/erasing speed, larger storage window, and better data retention at lower operating voltage. This limitation has restricted the development of the charge-trap memory, but can be addressed by using high-k dielectrics. The paper reviews the doping of nitrogen, titanium, and yttrium on high-k dielectrics as a storage layer by comparing MONOS devices with different storage layers. The results show that nitrogen doping increases the storage window of the Gd₂O₃ storage layer and improves its charge retention. Titanium doping can increase the charge capture rate of HfO₂ storage layer. Yttrium doping increases the storage window of the BaTiO₃ storage layer and improves its fatigue characteristics. Parameters such as the dielectric constant, leakage current, and speed of the memory device can be controlled by maintaining a suitable amount of external impurities in the device.