• 제목/요약/키워드: Electronic conduction

검색결과 574건 처리시간 0.026초

MMC HVDC의 전도 손실 계산을 위한 V-I 특성 곡선 근사 방법 (Linearization Method of V-I Characteristic for MMC HVDC Conduction Losses Calculation)

  • 나종서;김상민;김희진;정종규;허견
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2019년도 전력전자학술대회
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    • pp.303-304
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    • 2019
  • 본 논문에서는 모듈러 멀티레벨 컨버터(Modular Multilevel Converter, MMC) 고압직류송전(High Voltage Direct Current, HVDC)의 전도 손실 계산을 위한 반도체 스위치 V-I 특성 곡선 근사 방법을 제안한다. 일반적으로 V-I 특성 곡선은 정격 전류 구간에 대해서만 선형화하여 사용하지만, MMC HVDC의 경우 암 전류의 직류 오프셋에 의해 V-I 특성 곡선의 비선형 구간에서 손실 계산에 오차가 크게 나타난다. 따라서 본 논문에서는 암 전류의 부호에 따라 별도의 V-I 특성 곡선 근사를 적용하여 MMC HVDC의 전도 손실 계산의 정확성을 향상하는 방안을 제안한다. 전도 손실 계산 결과는 PSCAD 시뮬레이션으로 취득한 손실 값과 비교하여 결과를 검증하였다.

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비대칭 이중게이트 MOSFET의 상하단 산화막 두께비에 따른 전도중심에 대한 문턱전압 의존성 (Conduction Path Dependent Threshold Voltage for the Ratio of Top and Bottom Oxide Thickness of Asymmetric Double Gate MOSFET)

  • 정학기
    • 한국정보통신학회논문지
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    • 제18권11호
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    • pp.2709-2714
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    • 2014
  • 본 연구에서는 비대칭 이중게이트 MOSFET의 상하단 게이트 산화막 두께 비에 대한 문턱전압 및 전도중심의 변화에 대하여 분석하고자한다. 비대칭 이중게이트 MOSFET는 상하단 게이트 산화막의 두께를 다르게 제작할 수 있어 문턱전압이하 영역에서 전류를 제어할 수 있는 요소가 증가하는 장점이 있다. 상하단 게이트 산화막 두께 비에 대한 문턱전압 및 전도중심을 분석하기 위하여 포아송방정식을 이용하여 해석학적 전위분포를 구하였다. 이때 전하분포는 가우스분포함수를 이용하였다. 하단게이트 전압, 채널길이, 채널두께, 이온주입범위 및 분포편차를 파라미터로 하여 문턱전압 및 전도중심의 변화를 관찰한 결과, 문턱전압은 상하단 게이트 산화막 두께 비에 따라 큰 변화를 나타냈다. 특히 채널길이 및 채널두께의 절대값보다 비에 따라 문턱전압이 변하였으며 전도중심이 상단 게이트로 이동할 때 문턱전압은 증가하였다. 또한 분포편차보단 이온주입범위에 따라 문턱전압 및 전도중심이 크게 변화하였다.

알미늄 고체 전해 커패시터용 도전성 고분자막의 제조 (Preparation of Conduction Polymer for Solid Type Aluminum Electrolytic Capacitor)

  • 양성현;유광균;이기서
    • 대한전기학회논문지
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    • 제43권3호
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    • pp.528-531
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    • 1994
  • Digitalization in electronic system is required the capacitor which have a large capacitance with small size, low impedance at high frequency, and high reliability. The fabrication and its properties of aluminum solid electrolytic capacitor are investigated. Employing conduction polymer film such as, polypyrrole as solid electroylte, solid type aluminum electrolytic capacitors were made. The surface of insulationg oxide is covered with conducting polymer layer prepared by chemical oxidative polymerization. Thereafter this conducting layer is covered with conducting polymer prepared by electrochemical polymerization. The dielectric properties of these capacitors were also measured and discussed. Regarding on frequency characteristics of the trial made capacitor, impedance and ESR at high frequency is lower than those of the stacked type film capacitor. It is alo confirmed that temperature coefficient of capacitance and dissipation factor of the capacitor are lower than those of film capacitor and liquid type aluminum electrolytic capacitor.

저온 CVD PN-InP MISFETs (Low-temperature CVD PN-InP MISFETs)

  • 정윤하
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1987년도 전기.전자공학 학술대회 논문집(I)
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    • pp.473-476
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    • 1987
  • Low temperature phosphorus-nitride CVD was newly developed for a high quality gate insulator on InP substrate. This film showed the Poole-Frenkel type conduction in high electric field with resistivity higher than $1{\times}10^{14}$ ohm-cm near the electric field of $1{\times}10^7\;volt/cm$. The C-V hysteresis width was very small as 0.17 volt. The density of interface trap states was $2{\times}10^{11}cm^{-2}ev^{-1}$ below the conduction band edge of InP substrate. Effective electron mobility was about $1200-1500\;cm^2/Vsec$ and showed the instability of PN-InP MISFETs drain current reduced less than 10 percent for the period $0.5-10^3sec$.

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전력케이블용 가교폴리에틸렌의 공간전하 극성측정기술에 관한 연구 (A Study on the Space Charge Polarity Measurement Teasurement Technology of Cross-Linked Polyethylene for Power Cable)

  • 국상훈;서장수;김병인;박중순
    • 한국조명전기설비학회지:조명전기설비
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    • 제6권6호
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    • pp.23-31
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    • 1992
  • Charged particle in the polymers is supposed to affect the electrical conduction and to lead them th dielectrical breakdown finally. So we measured the space charge distribution made by application of high electric field and evaluated the polarity of the charged particle affected on electrical conduction and space charge formed in the insulating materials by using temperature gradient thermally stimulated current measurement method(TG-TSC measurement). As a result, in the cross-linked polyethylene, A-peak was caused from dipole polarization, C-peak was caused from ionic space charge polarization and D-peak was injected trap hole. Also we found it crossible the evaluated the polarity of injected trap carrier and electron(or hole) of carrier trap in the cross-lined polyethylene. We found that ${\gamma}$-ray irradiated low density polyethylene had a relation to the electronic trap and we also could get the value of electric field distribution in the samples of which evaluation was available.

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계통 연계 모듈형 태양광 전력변환장치 고효율화에 관한 연구 (A Study on High Efficiency for Grid-connected Modular Photovoltaic Power Conversion System)

  • 이우철
    • 조명전기설비학회논문지
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    • 제28권1호
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    • pp.36-44
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    • 2014
  • The conventional central photo voltaic inverters have several problems. First, shadow problem in each solar panel, and high DC voltage problem from each panel because of concentration to one central inverter. Therefore, module integrated inverter is proposed to solve these problems. The inverter should be small and cost effective. The cost and size in the inverter depend on the inductor. So the switching frequency should be increased to reduce the inductor and total size, but there is a problem in efficiency because of the losses in turn-on and turn-off. In the paper, the critical conduction mode(CRM) switching method is adopted to reduce the switching loss and interleaving method is proposed to increase the efficiency in Flyback converter. Finally, the validity of the proposed scheme is investigated with simulated and experimental results for a prototype system rated at 200W.

비대칭 DGMOSFET의 도핑분포함수에 따른 전도중심과 문턱전압이하 스윙의 관계 (Relation of Conduction Path and Subthreshold Swing for Doping Profile of Asymmetric Double Gate MOSFET)

  • 정학기
    • 한국정보통신학회논문지
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    • 제18권8호
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    • pp.1925-1930
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    • 2014
  • 본 연구에서는 비대칭 이중게이트(double gate; DG) MOSFET의 채널 내 도핑분포함수에 따른 전도중심과 문턱전압이하 스윙의 관계에 대하여 분석하였다. 비대칭 DGMOSFET의 채널크기는 매우 작기 때문에 불순물의 수가 매우 작으므로 고 도핑된 채널의 경우에 대하여 분석하였다. 이를 위하여 포아송방정식에서 해석학적 전위분포모델을 유도하였으며 도핑분포함수는 가우스분포함수를 사용하였다. 해석학적 전위분포모델을 이용하여 전도중심 및 문턱전압이하 스윙모델을 유도하였으며 채널길이 및 채널두께가 변할 때, 도핑분포함수의 변수인 이온주입범위 및 분포편차에 따른 전도중심 및 문턱전압이하 스윙의 변화를 관찰하였다. 결과적으로 전도중심이 상단게이트 단자로 이동할 때, 문턱전압이하 스윙 값은 감소하였으며 단채널 효과에 의하여 채널길이 감소 및 채널두께 증가에 따라 문턱전압이하 스윙 값은 증가하였다.

Conceptual design of cooling anchor for current lead on HTS field coils

  • Hyeon, C.J.;Kim, J.H.;Quach, H.L.;Chae, S.H.;Yoon, Y.S.;Lee, J.;Han, S.H.;Jeon, H.;Choi, Y.H.;Lee, H.G.;Kim, H.M.
    • 한국초전도ㆍ저온공학회논문지
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    • 제19권2호
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    • pp.38-43
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    • 2017
  • The role of current lead in high-temperature superconducting synchronous machine (HTSSM) is to function as a power supply by connecting the power supply unit at room temperature with the HTS field coils at cryogenic temperature. Such physical and electrical connection causes conduction and Joule-heating losses, which are major thermal losses of HTSSM rotors. To ensure definite stability and economic feasibility of HTS field coils, quickly and smoothly cooling down the current lead is a key design technology. Therefore, in this paper, we introduce a novel concept of a cooling anchor to enhance the cooling performance of a metal current lead. The technical concept of this technology is the simultaneously chilling and supporting the current lead. First, the structure of the current lead and cooling anchor were conceptually designed for field coils for a 1.5 MW-class HTSSM. Then, the effect of this installation on the thermal characteristics of HTS coils was investigated by 3D finite element analysis.

Relative Magneto-current of Magnetic Tunnel Transistor with Amorphous n-type Si Film

  • Lee, Sang-Suk;Lee, Jin-Yong;Hwang, Do-Guwn
    • Journal of Magnetics
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    • 제9권1호
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    • pp.23-26
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    • 2004
  • A magneto-current (MC) was investigated for magnetic tunnel transistor (MTT) with amorphous n-type Si film. A relative MC (more than 49.6%) was observed at an emitter-base bias voltage ($V_{EB}$) of 0.65 V at room temperature. Above a $V_{EB}$ of 0.70 V, however, a rapid decrease in MC was observed in the amorphous Si-based MTT. The collector current increasing and transfer ratio as emitter-base voltage were mainly due to the rapid creation electrons of conduction band states in the Si collector. This approach would make integration in various components and systems easier than a MTT grown on a semiconductor wafer.

전단일전력단을 갖는 고역율 형광등용 전자식 안정기 구현 (Implementation of a High-Power-Factor Single-Stage Electronic Bal last for fluorescent lamps)

  • 서철식;박재욱;김해준;노채균;김동희
    • 한국조명전기설비학회:학술대회논문집
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    • 한국조명전기설비학회 2001년도 학술대회논문집
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    • pp.123-127
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    • 2001
  • In this paper, prototype high-power-factor single-stage electronic ballast for fluorescent lamps is designed and implemented. A new low cost single stage high power factor electronic ballast for fluorescent lamps is based on integration of two-boost converter and LC type high frequency resonant converter. A ballast is obtained by simple construction, because full bridge rectifier diode is eliminated and simple control circuit is applied. Using two boost converter operating positive and negative half cycle respectively at line frequency (60Hz), operation in discontinuous conduction mode performs high power factor. The experimental results Show the good performance as PF 0.99, $A_{THD}$ 15.4%, and CF 1.65 at Output 63.5W.W.

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