• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.1
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• pp.143-148
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• 2015

In this paper a new method is proposed for realizing active floating inductors from voltage differencing transconductance amplifier(VDTA) which is being studied nowadays. This proposed method employs only one VDTA and one transconductance for designing an active inductor from a passive floating inductor and implementing it to integrated circuits. The number of CMOS transistors can be considerably reduced from 6~18 as 1~3 gm circuits can be eliminated and even without R the design can be made, which can help in reducing the size of the circuit and power consumption. The proposed VDTA floating inductor was successfully used in constructing 1 MHz second order biquad active bandpass filter and bandwidth could be adjusted from 77kHz~1.59MHz by the changes made in gm from 6uS~20uS.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.3
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• pp.197-204
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• 2002

DRAM, SRAM, and FLASH memory are three major memory devices currently used in most electronic applications. But, they have very distinct attributes, therefore, each memory could be used only for limited applications. MRAM (Magneto-resistive Random Access Memory) is a promising candidate for a universal memory that meets all application needs with non-volatile, fast operational speed, and low power consumption. The simplest architecture of MRAM cell is a series of MTJ (Magnetic Tunnel Junction) as a data storage part and MOS transistor as a data selection part. To be a commercially competitive memory device, scalability is an important factor as well. This paper is testing the actual electrical parameters and the scaling factors to limit MRAM technology in the semiconductor based memory device by an actual integration of MRAM core cell. Electrical tuning of MOS/MTJ, and control of resistance are important factors for data sensing, and control of magnetic switching for data writing.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.14 no.8
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• pp.3243-3256
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• 2020

Recent years have shown a great interest of public in buying and selling of crypto/digital currency. With hundreds of digital currencies in financial market, bitcoin remains the most widely used, adapted, and accepted currency around the world. However, the critics of bitcoin still consider it a threat to modern day power usage. This paper discusses the important pitfalls, pros, and cons related to bitcoin's energy consumption. The paper begins by highlighting the flexibilities cryptocurrency can bring to online money transfers compared to traditional 'fiat' architecture. Then, the focus of the paper entirely remains on listing various facts related to bitcoin's energy utilization including a brief description of several emerging approaches for energy optimization. This paper is concluded by revealing key current challenges associated to bitcoin's energy usage.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.2
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• pp.23-29
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• 2014

Less power consumption, lower cost, smaller size and more functionality are the increasing demands for consumer electronic devices. The three dimensional(3-D) TSV packaging technology is the potential solution to meet this requirement because it can supply short vertical interconnects and high input/output(I/O) counts. Cu(Copper) has usually been chosen to fill the TSV because of its high conductivity, low cost and good compatibility with the multilayer interconnects process. However, the CTE mismatch and Cu ion drift under thermal stress can raise reliability issues. This study discribe the thermal stress reliability trend for successful implementation of 3-D packaging.

• Journal of Korea Society of Digital Industry and Information Management
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• v.7 no.2
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• pp.59-65
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• 2011

All-optical signal processing is expected to offer advantages in speed and power consumption against over electronics signal processing. It has a potential to solve the bottleneck issues of ultra-high speed communication network nodes. All-optical serial-to-parallel and parallel-to-serial data converters would make it possible to easily process the serial data information of a high-speed optical packet without optical-to-electronic-to-optical data conversion. In this paper, we explain the principle of simple and easily expandable all-optical serial-to-parallel and parallel-to-serial data converters based on Mach-Zehnder interferometers. We experimentally demonstrate these data converters at 10Gbit/s serial data rate. They are useful all-optical devices for the all-optical implementations of label decoding, self-routing, control of variable packets, bit-wise logical operation, and data format conversion.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.3 no.3
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• pp.671-679
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• 1999

In this paper, humidity measurement is accomplished using humidity sensor, dehumidify is implemented using general-purpose $\mu$-processorPIC16C54 and thermoelectric module for control measured humidity and input target humidity value proportionally Pottier module product is variety kind of size and characteristic, very important drawing factor is selection necessary heat sink, which is maintain proper thermal resistance from variety kind of module also. From electronic dehumidifier is manufacture by using thermoelectric module, no sound, no vibration, low power consumption of partial space efficient dehumidify proves the validity of this system.

• Journal of Korea Society of Industrial Information Systems
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• v.18 no.1
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• pp.19-24
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• 2013

As CMOS technology is scaled down more aggressively, the reliability mechanism (or aging effect) caused by the diffusion of metal atoms along the conductor in the direction of the electron flow, also called electromigration (EM), has become a major reliability concern. With the present of EM, it is difficult to control the current flows of the MOSFET device and interconnect. In addition, nanoscale CMOS circuits suffer from increased gate leakage current and power consumption. In this paper, the EM effects on current of the nanoscale CMOS circuits are analyzed. Finally, this paper introduces an on-chip current measurement method providing lifetime electromigration management which are designed using 45-nm CMOS predictive technology model.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.5 no.3
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• pp.164-168
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• 2012

LDPC decoder architectures are generally classified into serial, parallel and partially parallel architectures. Conventional method of LDPC decoding in general give rise to a large number of computation operations, mass power consumption, and decoding delay. It is necessary to reduce the iteration numbers and computation operations without performance degradation. This paper studies Horizontal Shuffle Scheduling (HSS) algorithm. In the result, number of iteration is half than conventional algorithm without performance degradation. Finally, this paper present design methodology of high-speed LDPC decoder and confirmed its throughput is up to about 600Mbps.

• Journal of Information Processing Systems
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• v.13 no.5
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• pp.1320-1330
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• 2017

Wireless sensor networks for forest monitoring are typically deployed in fields in which manual intervention cannot be easily accessed. An interesting approach to extending the lifetime of sensor nodes is the use of energy harvested from the environment. Design constraints are application-dependent and based on the monitored environment in which the energy harvesting takes place. To reduce energy consumption, we designed a power management scheme that combines dynamic duty cycle scheduling at the network layer to plan node duty time. The dynamic duty cycle scheduling is realized based on a tier structure in which the network is concentrically organized around the sink node. In addition, the multi-paths preserved in the tier structure can be used to deliver residual packets when a path failure occurs. Experimental results show that the proposed method has a better performance.

• Proceedings of the SAREK Conference
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• 2006.06a
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• pp.489-494
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• 2006

Electronic and telecommunication industries are constantly trying to develop compact components having high power density. Therefore, a proper heat dissipation method is very important to allow reliable operation of the telecommunication equipment. In this study, a hybrid refrigeration system for a telecommunication equipment room was designed to save energy consumption and improve reliability of the compressor In addition, the performance of the hybrid refrigeration system was measured with a variation of outdoor load. The designed hybrid refrigeration system for the telecommunication equipment shelter saved the energy approximately 50%e at the mode switch temperature of $8.3^{\circ}C$.