• Title/Summary/Keyword: Electronic Hardware

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Design and Realization of the Sailing System for Mille and Small Leisure Ships (중소형 레저선박용 운항시스템 설계 및 구현)

  • Oh, Hong-Geun;Park, Jung-Min;Kim, Chul-Won
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.3
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    • pp.411-418
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    • 2017
  • In the domestic case, although technological capabilities are recognized globally in the IT field, it is actually that the technical capabilities of the domestic leisure ship market which is formed mainly by fishing vessels are not beyond their technical capabilities At the point where the GNP of our country already goes over 22,000 dollars, the demand for the products related to the middle and small leisure boats is gradually increasing, but most of the high added value products depend on the imports from U.S.A. and Europe. And in case of the cars, with the Car Navigation as the start, products which satisfies various demands of the users are coming out in large quantity and now the IT technology is the necessity which can not be lived without in the car industry. Thus, if the digital ship navigator which jointed the recent ICT technology which was applied to the land for the domestic middle and small leisure ships by utilizing the embedded hardware technology and mapping technology which are credible is developed and distributed, it will become not only the opportunity to improve the industry related to middle and small ship IT, but also, the export about overseas market can be expected.

A Study on 3D RTLS at Port Container Yards Using the Extended Kalman Filter

  • Kim, Joeng-Hoon;Lee, Hyun-Woo;Kwon, Soon-Ryang
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • v.7 no.4
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    • pp.228-235
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    • 2007
  • The main purpose of this paper is to manage the container property effectively at the container yard by applying the RTLS technology to the field of port logistics. Yet, many kinds of noises happen to be inputted with the distance value(between the reader and the tag) which is to be inputted into the location identification algorithm, which makes the distance value jumped due to the system noise of the ultrasonic sensor module and the measurement noise. The Kalman Filter is widely used to prevent this jump occurrence; the noises are eliminated by using the EKF(Extended Kalman Filter) while considering that the distance information of the ultrasonic sensor is non-linear. Also, the 3D RTLS system at the port container yard suggested in this research is designed not to be interrupted for its ultrasonic transmission by positioning the antenna at the front of each sector of the container where the active tags are installed. We positioned the readers, which function as antennas for location identification, to four places randomly in the absolute coordinate and let the positions of the active tags identified by using the distance data delivered from the active tags. For the location identification algorithm used in this paper, the triangulation measurement that is most used in general is applied and newly reorganized to calculate the position of the container. In the first experiment, we dealt with the error resulting in the angle and the distance of the ultrasonic sensor module, which is the most important in the hardware performance; in the second, we evaluated the performance of the location identification algorithm, which is the most important in the software performance, and tested the noise cancellation effects for the EKF. According to the experiment result, the ultrasonic sensor showed an average of 3 to 5cm error up to $45^{\circ}$ in case of $60^{\circ}$ or more, non-reliable linear distances were obtained. In addition, the evaluation of the algorithm performance showed an average of $4^{\circ}{\sim}5^{\circ}$ error due to the error of the linear distance-this error is negligible for most container location identifications. Lastly, the experiment results of noise cancellation and jump preservation by using the EKF showed that noises were removed in the distance information which was entered from the input of the ultrasonic sensor and as a result, only signal was extracted; thus, jumps were able to be removed and the exact distance information between the ultrasonic sensors could be obtained.

The Design and Implementation of Mode S Extended Squitter Demodulator with Multi-signal Level Tuning Method (다중신호레벨튜닝 기법을 사용한 Mode S 확장스퀴터 수신기의 복조부 설계 및 구현)

  • Shin, Hee-Sung;Yoon, Jun-Chul;Seo, Jong-Deok;Choi, Sang-Bang
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.3
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    • pp.697-707
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    • 2015
  • This paper covered the design and implementation of the demodulation receiver in the ADS-B 1090ES system, which is one of the CNS/ATM's surveillance systems. This researched demodulation performed at the level required by RTCA DO-268B and EUROCAE ED-129. The single signal process method, which applies a baseline multi-sample technique among multi-amplitude sample demodulations, was suggested to improve the quality of the receiver signal, the dynamic range and so on. The suggested multi-signal level tuning method has enhanced the single-signal process method, reducing the unstable reception ratio by the transmit output level difference and manufacturing receiver hardware. The result was that the receiver suggested by the method had 0~87dBm in dynamic range and -90dBm in MTL. This shows a better performance by -3dBm less than the international standard in ADS-B 1090ES ground receiver equipment. The systems which use a similar modulation method, will be considered to be widely applied.

MPEG-H 3D Audio Decoder Structure and Complexity Analysis (MPEG-H 3D 오디오 표준 복호화기 구조 및 연산량 분석)

  • Moon, Hyeongi;Park, Young-cheol;Lee, Yong Ju;Whang, Young-soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.42 no.2
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    • pp.432-443
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    • 2017
  • The primary goal of the MPEG-H 3D Audio standard is to provide immersive audio environments for high-resolution broadcasting services such as UHDTV. This standard incorporates a wide range of technologies such as encoding/decoding technology for multi-channel/object/scene-based signal, rendering technology for providing 3D audio in various playback environments, and post-processing technology. The reference software decoder of this standard is a structure combining several modules and can operate in various modes. Each module is composed of independent executable files and executed sequentially, real time decoding is impossible. In this paper, we make DLL library of the core decoder, format converter, object renderer, and binaural renderer of the standard and integrate them to enable frame-based decoding. In addition, by measuring the computation complexity of each mode of the MPEG-H 3D-Audio decoder, this paper also provides a reference for selecting the appropriate decoding mode for various hardware platforms. As a result of the computational complexity measurement, the low complexity profiles included in Korean broadcasting standard has a computation complexity of 2.8 times to 12.4 times that of the QMF synthesis operation in case of rendering as a channel signals, and it has a computation complexity of 4.1 times to 15.3 times of the QMF synthesis operation in case of rendering as a binaural signals.

8×8 HEVC Inverse Core Transform Architecture Using Multiplier Reuse (곱셈기를 재사용하는 8×8 HEVC 코어 역변환기 설계)

  • Lee, Jong-Bae;Lee, Seongsoo
    • Journal of IKEEE
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    • v.17 no.4
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    • pp.570-578
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    • 2013
  • This paper proposed an $8{\times}8$ HEVC inverse core transform architecture reusing multipliers. In HEVC core transform, processing of lower size block is identical with even part of upper size block. So an $8{\times}8$ core transform architecture can process both $8{\times}8$ and $4{\times}4$ core transforms. However, when $8{\times}8$ core transform architecture is exploited, frame processing time doubles in $4{\times}4$ core transform, since $8{\times}8$ and $4{\times}4$ core transforms concurrently process 8 and 4 pixels, respectively. In this paper, a novel inverse core transform architecture is proposed based on multiplier reuse. It runs as an $8{\times}8$ inverse core transformer or two $4{\times}4$ inverse core transformer. Its frame processing time is same in $8{\times}8$ and $4{\times}4$ core transforms, and reduces gate counts by 12%.

Implementation of a Web-based Hybrid Engineering Experiment System for Enhancing Learning Efficiency (학습효율 향상을 위한 웹기반 하이브리드 공학실험시스템 구현)

  • Kim, Dong-Sik;Choi, Kwan-Sun;Lee, Sun-Heum
    • Journal of Engineering Education Research
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    • v.10 no.3
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    • pp.79-92
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    • 2007
  • To enhance the excellence, effectiveness and economical efficiency in the learning process, we implement a hybrid educational system for engineering experiments where web-based virtual laboratory systems and distance education systems are properly integrated. In the first stage, we designed client/server distributed environment and developed web-based virtual laboratory systems for digital systems and electrical/electronic circuit experiments. The proposed virtual laboratory systems are composed of four important sessions and their management system: concept learning session, virtual experiment session, assessment session. With the aid of the management system every session is organically tied up together to achieve maximum learning efficiency. In the second stage, we have implemented efficient and cost-effective distant laboratory systems for practicing electric/electronic circuits, which can be used to eliminate the lack of reality occurred during virtual laboratory session. The use of simple and user-friendly design allows a large number of people to access our distant laboratory systems easily. Thus, self-guided advanced training is available even if a lot of expensive equipment will not be provided in the on-campus laboratories. The proposed virtual/distant laboratory systems can be used in stand-alone fashion, but to enhance learning efficiency we integrated them and developed a hybrid educational system for engineering experiments. Our hybrid education system provides the learners with interactive learning environment and a new approach for the delivery of engineering experiments.

High Performance SoC On-chip-bus Architecture with Multiple Channels and Simultaneous Routing (다중 채널과 동시 라우팅 기능을 갖는 고성능 SoC 온 칩 버스 구조)

  • Lee, Sang-Hun;Lee, Chan-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.4
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    • pp.24-31
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    • 2007
  • Up to date, a lot of bus protocol and bus architecture are released though most of them are based on the shared bus architecture and inherit the limitation of performance. SNP (SoC Network Protocol), and hence, SNA (SoC Network Architecture) which are high performance on-chip-bus protocol and architecture, respectively, have been proposed to solve the problems of the conventional shared bus. We refine the SNA specification and improve the performance and functionality. The performance of the SNA is improved by supporting simultaneous routing for bus request of multiple masters. The internal routing logic is also improved so that the gate count is decreased. The proposed SNA employs XSNP (extended SNP) that supports almost perfect compatibility with AMBA AHB protocol without performance degradation. The hardware complexity of the improved SNA is not increased much by optimizing the current routing logic. The improved SNA works for IPs with the original SNP at its best performance. In addition, it can also replace the AMBA AHB or interconnect matrix of a system, and it guarantees simultaneous multiple channels. That is, the existing AMBA system can show much improved performance by replacing the AHB or the interconnect matrix with the SNA. Thanks to the small number of interconnection wires, the SNA can be used for the off-chip bus system, too. We verify the performance and function of the proposed SNA and XSNP simulation and emulation.

Development of a Portable Card Reader for the Visually Impaired using Raspberry Pi (라즈베리 파이를 적용한 시각장애인을 위한 휴대용 카드 리더기 개발)

  • Lee, Hyun-Seung;Choi, In-Moon;Lim, Soon-Ja
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.18 no.10
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    • pp.131-135
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    • 2017
  • We developed a portable card reader for the visually impaired. In South Korea, there is insufficient development of lifestyle aids for people with disabilities. Living aids for people with disabilities are being developed using information technology, smart phones, Internet of Things(IoT) devices, 3D printers, and so on. Blind people were interviewed, which showed that the card recognition function using a currently developed smart phone app was not able to recognize the screen of the smart phone by the hand of the visually impaired, and it was inconvenient to operate. In recent years, devices that enable the visually impaired to recognize cards have been studied in foreign countries and are emerging prototypes. But what is currently available is expensive and inconvenient. In addition, visually impaired people are most vulnerable to low-income families, which makes it difficult to purchase and use expensive devices. In this study, we developed a card reader that recognizes a card using a Raspberry Pi, which is an open-source hardware that can be applied to IoT. The card reader plays it by voice and vibration, and the visually impaired can use it at a low price.

Magnetic Resonance Elastography (자기 공명 탄성법)

  • Kim, Dong-Hyun;Yang, Jae-Won;Kim, Myeong-Jin
    • Investigative Magnetic Resonance Imaging
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    • v.11 no.1
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    • pp.10-19
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    • 2007
  • Conventional MRI methods using T1-, T2-, diffusion-, perfusion-weighting, and functional imaging rely on characterizing the physical and functional properties of the tissue. In this review, we introduce an imaging modality based on measured the mechanical properties of soft tissue, namely magnetic resonance elastography (MRE). The use of palpation to identify the stiffness of tissue remains a fundamental diagnostic tool. MRE can quantify the stiffness of the tissue thereby providing a objective means to measure the mechanical properties. To accomplish a successful clinical setting using MRE, hardware and software techniques in the area of transducer, pulse sequence, and imaging processing algorithm need to be developed. Transducer, a mechanical vibrator, is the core of MRE application to make wave propagate invivo. For this reason, considerations of the frame of human body, pressure and friction of the interface, and high magnetic field of a MRI system needs to be taken into account when designing a transducer. Given that the wave propagates through human body effectively, developing an appropriate pulse sequence is another important issue in obtaining an optimal image. In this review paper, we introduce the technical aspects needed for MRE experiments and introduce several applications of this new field.

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Performance Comparison of Taylor Series Approximation and CORDIC Algorithm for an Open-Loop Polar Transmitter (Open-Loop Polar Transmitter에 적용 가능한 테일러 급수 근사식과 CORDIC 기법 성능 비교 및 평가)

  • Kim, Sun-Ho;Im, Sung-Bin
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.47 no.9
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    • pp.1-8
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    • 2010
  • A digital phase wrapping modulation (DPM) open-loop polar transmitter can be efficiently applied to a wideband orthogonal frequency division multiplexing (OFDM) communication system by converting in-phase and quadrature signals to envelope and phase signals and then employing the signal mapping process. This mapping process is very similar to quantization in a general communication system, and when taking into account the error that appears during mapping process, one can replace the coordinates rotation digital computer (CORDIC) algorithm in the coordinate conversion part with the Taylor series approximation method. In this paper, we investigate the application of the Taylor series approximation to the cartesian to polar coordinate conversion part of a DPM polar transmitter for wideband OFDM systems. The conventional approach relies on the CORDIC algorithm. To achieve efficient application, we perform computer simulation to measure mean square error (MSE) of the both approaches and find the minimum approximation order for the Taylor series approximation compatible to allowable error of the CORDIC algorithm in terms of hardware design. Furthermore, comparing the processing speeds of the both approaches in the implementation with FPGA reveals that the Taylor series approximation with lower order improves the processing speed in the coordinate conversion part.