• Title/Summary/Keyword: Electronic Device

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Characteristics of Fabricated Devices and Process Parameter Extraction by DTC (DTC에 의한 공정 파라메터 추출 및 제작된 소자의 특성)

  • 서용진;이철인;최현식;김태형;최동진;장의구
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1993.11a
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    • pp.29-34
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    • 1993
  • In this paper, we used one-dimensional process simulator, SUPREM-II, and two-dimensional device simulator, MINIMOS 4.0 to extract optimal process parameter that can minimize degradation of device characteristics caused by process parameter variation in the case of short channel nMOSFET and pMOSFET device. From this simulation, we have derieved the relationship between process parameter and device characteristics. Here we have presented a method to extract process parameters from design trend curve(DTC) obtained by process and device simulations. We parameters to verify the validity of the DTC method. The experimental result of 0.8 $\mu\textrm{m}$ channel length devices that have been fabricated with optimal that reduces short channel effects, that is, good drain current-voltage characteristics, low body effects and threshold voltage of 1.0 V, high punchthrough and breakdown voltage of 12 V, low subthreshold swing(S.S) values of 105 mV/decade.

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Planarization characteristics as a function of polishing time of STI-CMP process (STI CMP 공정의 연마시간에 따른 평탄화 특성)

  • 김철복;서용진;김상용;이우선;장의구
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.33-36
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    • 2001
  • Chemical mechanical polishing(CMP) process has been widely used to planarize dielectric layers, which can be applied to the integrated circuits for deep sub-micron technology. The rise throughput and the stability in the device fabrication can be obtained by applying of CMP process to STI structure in 0.18$\mu\textrm{m}$ m semiconductor device. The reverse moat process has been added to employ in of each thin films in STI-CMP was not equal, hence the devices must to be effected, that is, the damage was occurred in the device area for the case of excessive CMP process and the nitride film was remained on the device area for the case of insufficient CMP process, and than, these defects affect the device characteristics. Also, we studied the High Selectivity Slurry(HSS) to perform global planarization without reverse moat step.

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A Study on Process and Characteristics of nMOSFET by DTC Method (DTC에 의한 MOSFET의 공정 및 소자특성에 관한 연구)

  • 류찬형;신희갑;이철인;서용진;김태형
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1995.11a
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    • pp.236-239
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    • 1995
  • In short channel MOSFET, it is very important to establish optimal process conditions because of variation of devise characteristics due to the process parameters. In this paper, we used process simulator and device simulator in order to optimize process parameter which changes of the device characteristics caused by process parameter variation. From this simulation, it has been derived to the dependence relations between process parameter and device characteristics. The experimental results of fabricated short channel device according to the optimal process parameters demonstrate good device characteristics.

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Emission Property of Organic EL Device using Polyaniline Transparent Electrode (Polyaniline 투명전극을 사용한 유기EL 소자의 발광 특성)

  • Kim, Ju-Seung;Kim, Dae-Jung;Gu, Hal-Bon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11b
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    • pp.374-377
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    • 2001
  • We have synthesized poly(3-hexylthiophene)(P3HT), which is the most famous conducting polymer and studied the optical properties of P3HT. And then fabricated the device using P3HT as an emitting layer. For the improve of hole injection from ITO electrode to P3HT emitting layer, we use transparent polyaniline(PANI) electrode. In the voltage-current-luminance characteristics of ITO/PANI/P3HT/LiF/Al device which use the PANI film synthesised during 5 cycle, the device turn on at the 2V and the luminance of $218nW/cm^{2}$ obtained at 12V. External quantum efficiency of ITO/PANI/P3HT/LiF/Al increased at 8V than that of ITO/P3HT/LiF/Al device.

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Fabrication of a SOI Hall Device Using Si -wafer Dircet Bonding Technology (실리콘기판 직접접합기술을 이용한 SOI 흘 소자의 제작)

  • 정귀상
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1994.11a
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    • pp.86-89
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    • 1994
  • This paper describes the fabrication and basic characteristics of a Si Hall device fabricated on a SOI(Si-on-insulator) structure. In which SOI structure was formed by SOB(Si-wafer direct bonding) technology and the insulator of the SOI structure was used as the dielectrical isolation layer of a Hall device. The Hall voltage and sensitivity of the implemented SDB SOI Hall devices showed good linearity with respectivity to the applied magnetic flux density and supple iud current. The product sensitivity of the SDB SOI Hall device was average 670 V/A$.$T and its value has been increased up to 3 times compared to that of bulk Si with buried layer of 10$\mu\textrm{m}$. Moreover, this device can be used at high-temperature, high-radiation and in corrosive environments.

Effects of PEDOT:PSS Buffer Layer in a Device Structure of ITO/PEDOT:PSS/TPD/Alq3/Cathode

  • Ahn, Joon-Ho;Lee, Joon-Ung
    • Transactions on Electrical and Electronic Materials
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    • v.6 no.1
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    • pp.25-28
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    • 2005
  • We have investigated the effects of hole-injection buffer layer in organic light-emitting diodes using poly(3,4-ethylenedioxythiophene):poly(stylenesulfonate)(PEDOT:PSS) in a device structure of $ITO/PEDOT:PSS/TPD/Alq_{3}/cathode$. Polymer PEDOT:PSS buffer layer was made by spin casting method. Current-voltage, luminance-voltage characteristics and efficiency of device were measured at room temperature with a variation of cathode materials; Al, LiF/Al, LiAl, and Ca/Al. The device with LiF/Al cathode shows an improvement of external quantum efficiency approximately by a factor of ten compared to that of Al cathode only device. Our observation shows that cathode is important in improving the efficiency of the organic light-emitting diodes.

Electrical Properties by Organic Thin Films According to Manufacture Condition (제작조건에 따른 유기박막의 전기특성)

  • Song, Jin-Won;Lee, Kyung-Sup
    • Proceedings of the KIEE Conference
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    • 2000.11c
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    • pp.467-469
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    • 2000
  • We give pressure stimulation into organic thin films and then manufacture a device under the accumulation condition that the state surface pressure is 20[mN/m]. LB layers of Arac. acid deposited by LB method were deposited onto Y-type silicon wafer as x, y, z-type film. In processing of a device manufacture, we can see the process is good from the change of a surface pressure for organic thin films and transfer ratio of area per molecule. The structure of manufactured device is Au/arachidic acid/Al, the number of accumulated layers Also, we then examined of the MIM device by means of I-V. The I-V characteristic of the device is measured from 0 to +2[V].

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Emission Properties of Electroluminescent Device having Emitting Layer Dried at Different Temperature (발광층의 건조온도에 따른 전계발광소자의 발광특성)

  • 서부완;구할본
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.11a
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    • pp.602-605
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    • 1999
  • We dried emitting layer of EL device at 30, 80, I20 and $150^{\circ}C$ for Ihr to investigate the effects to the emission characteristics of devices. PL intensity of P3HT thin film decreased with increasing the drying temperature. But, the EL intensity and stability of device with emitting layer dried at $150^{\circ}C$ were the best. We think it s because of absence of water and remaining solvent in P3HT emitting layer. So, We suggest that the drying temperature of emitting layer of EL device should be select slightly low temperature than its glass transition temperature.

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Electrical Properties of Organic Thin Films by Deposition Type (유기박막의 누적형태에 따른 전기특성)

  • 송진원;이경섭
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.11a
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    • pp.287-290
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    • 2000
  • We give pressure stimulation into organic thin films and then manufacture a device under the accumulation condition that the state surface pressure is 20[mN/m]. LB layers of Arac. acid deposited by LB method were deposited onto y-type silicon wafer as x, y, z-type film. In processing of a device manufacture, we can see the process is good from the change of a surface pressure for organic thin films and transfer ratio of area per molecule. The structure of manufactured device is Au/arachidic acid/Al, the number of accumulated layers. Also, we then examined of the MIM device by means of I-V. The I-V characteristic of the device is measured from 0 to +2[V].

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Emission Property of Organic EL Device using Polyaniline Transparent Electrode (Polyaniline 투명전극을 사용한 유기EL 소자의 발광 특성)

  • 김주승;김대중;구할본
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11a
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    • pp.374-377
    • /
    • 2001
  • We have synthesized poly(3-hexylthiophene)(P3HT), which is the most famous conducting polymer and studied the optical properties of P3HT. And then fabricated the device using P3HT as an emitting layer. For the improve of hole injection from ITO electrode to P3HT emitting layer, we use transparent polyaniline(PANI) electrode. In the voltage-current-luminance characteristics of ITO/PANI/P3HT/LiF/Al device which use the PANI film synthesised during 5 cycle, the device turn on at the 2V and the luminance of 218 nW/$\textrm{cm}^2$ obtained at 12V. External quantum efficiency of ITO/PANI/P3HT/LiF/Al increased at 8V than that of ITO/P3HT/LiF/Al device.

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