• Transactions of the Korean Society of Mechanical Engineers A
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• v.36 no.12
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• pp.1563-1568
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• 2012

Printed electronics is a technology used for forming electronic circuits or devices, and it is used in the manufacture of many products such as RFID tags, solar cells, and flexible display panels with a much lower cost than in the case of semiconductor process technology. Web-guide-type printing such as roll-to-roll printing is a method used to produce printed electronic devices in a large volume. To commercialize such products, highly precise alignment between printed layers is required. In this study, a highly precise alignment system is proposed, and some experimental results are compared with those obtained using a laser surface vibrometer to illustrate the reliability of the proposed system. The robustness of the proposed system to web deformation is also considered experimentally.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.9
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• pp.800-807
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• 2006

To enhance the conversion speed more fast, we separate the determination process of MSB and LSB with the two independent ADC circuits of the Incremental Sigma Delta ADC. After the 1st Incremental Sigma Delta ADC conversion finished, the 2nd Incremental Sigma Delta ADC conversion start while the 1st Incremental Sigma Delta ADC work on the next input. By determining the MSB and the LSB independently, the ADC conversion speed is improved by two times better than the conventional Extended Counting Incremental Sigma Delta ADC. In processing the 2nd Incremental Sigma Delta ADC, the inverting sample/hold circuit inverts the input the 2nd Incremental Sigma Delta ADC, which is the output of switched capacitor integrator within the 1st Incremental Sigma Delta ADC block. The increased active area is relatively small by the added analog circuit, because the digital circuit area is more large than analog. In this paper, a 14 bit Extended Counting Incremental Sigma-Delta ADC is implemented in $0.25{\mu}m$ CMOS process with a single 2.5 V supply voltage. The conversion speed is about 150 Ksamples/sec at a clock rate of 25 MHz. The 1 MSB is 0.02 V. The active area is $0.50\;x\;0.35mm^{2}$. The averaged power consumption is 1.7 mW.

• Nuclear Engineering and Technology
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• v.48 no.5
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• pp.1206-1218
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• 2016

This article proposes a highly reliable power and communication system that guarantees the protection of essential instruments in a nuclear power plant under a severe accident. Both power and communication lines are established with not only conventional wired channels, but also the proposed wireless channels for emergency reserve. An inductive power transfer system is selected due to its robust power transfer characteristics under high temperature, high pressure, and highly humid environments with a large amount of scattered debris after a severe accident. A thermal insulation box and a glass-fiber reinforced plastic box are proposed to protect the essential instruments, including vulnerable electronic circuits, from extremely high temperatures of up to $627^{\circ}C$ and pressure of up to 5 bar. The proposed wireless power and communication system is experimentally verified by an inductive power transfer system prototype having a dipole coil structure and prototype Zigbee modules over a 7-m distance, where both the thermal insulation box and the glass-fiber reinforced plastic box are fabricated and tested using a high-temperature chamber. Moreover, an experiment on the effects of a high radiation environment on various electronic devices is conducted based on the radiation test having a maximum accumulated dose of 27 Mrad.

• The Journal of Engineering Research
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• v.2 no.1
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• pp.31-37
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• 1997

This paper describes the design and implementation of 8 bit ALU graphic simulator which helps students who study the structure and operation course of general ALU. ALU of this paper consists of three parts, arithmetic circuit, logic circuit, and shifter. Each of them performs as follows. Arithmetic circuit performs arithmetic operation such as addition, subtraction, 1 increment, 1 decrement, 2's complement, logic circuit performs logic operation such as OR, AND, XOR, NOT, and shifter performs shift operation and transfers the result of circuits of arithmetic, logic to data bus. The instructions which relate to these basic ALU functions was selected from Z80 instructions and ALU circuit was designed with those instructions and this designed ALU circuit was implemented on graphic screen. And all state of this data operation course in ALU was showed by bit and logic gate unit.

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.5
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• pp.46-54
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• 1984

A silicon-gate n-well CMOS process with 3 $\mu$m gate length was developed and its possibility for the applications was discussed,. Threshold voltage was easily controlled by ion implantation and 3-$\mu$m gate length with 650 $\AA$ oxide shows ignorable short channel effect. Large value of Al-n+ contact resistance is one of the problems in fabrications of VLSI circuits. Transfer characteristics of CMOS inverter is fairly good and the propagation delay time per stage in ring oscillator with layout of (W/L) PMOS /(W/L) NMOS =(10/5)/(5/5) is about 3.4 nsec. catch-up occurs on substrate current of 3-5 mA in this process and critically dependent on the well doping density and nt-source to n-well space. Therefore, research, more on latch-up characteristics as a function of n-well profile and design rule, especially n+-source to n-well space, is required.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.8
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• pp.29-35
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• 2010

In this paper we propose a new pattern generator for a BIST architecture that can reduce the power consumption during test application. The principle of the proposed method is to reconstruct an LFSR circuit to reduce WSAs of the heavy nodes by suppressing the heavy inputs. We propose algorithms for finding heavy nodes and heavy inputs. Using the Modified LFSR which consists of some AND/OR gates trees and an original LFSR, BIST applies modified test patterns to the circuit under test. The proposed BIST architecture with small hardware overhead effectively reduces the average power consumption during test application while achieving high fault coverage. Experimental results on the ISCAS benchmark circuits show that average power reduction can be achieved up to 30.5%.

• The Journal of the Korea institute of electronic communication sciences
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• v.5 no.5
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• pp.487-492
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• 2010

In this study, our system that the volume of collected human waste in the septic tank truck is measured accurately and the fee of disposing human waste can be calculated by using measured results has been developed. The level sensor and its circuits which can measure the height of the tank, the hand-held system that can be used by workers easily and simply with micro-controller have been developed. Also, this system has been built in the receipt printing function to charge for disposal fee. Even when working on a sloping field, this system can measure the accurate collected volume of human waste in the tank using the X-Y axis angle sensor. The results of this study expect that the popular complaints that generated from human waste can be reduced, the exportation possibility of our specialized systems can acquire foreign currency.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.05c
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• pp.21-23
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• 2004

We report experimental results demonstrating a novel metal defined polymer optical waveguide with a low loss in electro-optic polymers for the first time. The polymer optical waveguides are created using a metal film on the top of upper cladding without any conventional etching process. The fabricated waveguides have an excellent lateral optical mode confinement at both 1.31 ${\square}m$ and 1.55 ${\square}m$ wavelength, resulting in a fiber-to lens optical insertion loss of ~ 7 dB at 1.55 ${\square}m$ and ~4.5 dB at 1.31 ${\square}m$ wavelength in a 3.5cm total length for TM polarizations, respectively. We also present the optical loss dependence of the waveguide as a function of optical wavelengths. These results may be used in the complex design of integrated polymer optical circuits that need simpler and cheaper fabrication process.

• The Journal of the Korea institute of electronic communication sciences
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• v.7 no.6
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• pp.1301-1308
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• 2012

In this paper, the low-power clock generator synchronized with the AC power signal using the adiabatic dynamic CMOS logic (ADCL) buffer is proposed for adiabatic logics. To reduce the power dissipation in conventional CMOS logic and to maintain adiabatic charging and discharging with low power for the ADCL, the clock signal of logic circuits should be synchronized with the AC power source. The clock signal for an adiabatic charging and discharging with the AC power signal was generated with the designed Schmitt trigger circuit and ADCL frequency divider using the ADCL buffer. From the simulation result, the power consumption of the proposed clock generator was estimated with approximately 1.181uW and 37.42uW at output 3kHz and 10MHz respectively.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.2
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• pp.133-138
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• 2017

This paper presents a jitter characteristic improved phase locked loop (PLL) with an RC time constant circuit. In the RC time constant circuit, LPF's voltage is inputted to a comparator through small and large RC time constant circuits. The signal through a small RC time constant circuit has almost same loop filter output voltage. The signal through a large RC time constant circuit has the average value of loop filter output voltage and does as a role of reference voltage to the comparator. The output of the comparator controls the sub-charge pump which provide a current to LPF. When the loop filter output voltage increases, the sub-charge pump discharges the loop filter and decreases loop filter output voltage. When the loop filter output voltage decreases, the sub-charge pump charges the loop filter and increases loop filter output voltage. The negative feedback loop reduces the variation of loop filter output voltage resulting in jitter characteristic improvement.