• IEIE Transactions on Smart Processing and Computing
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• v.6 no.2
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• pp.133-139
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• 2017

Vehicles have increasingly evolved and become intelligent with convergence of information and communications technologies (ICT). Vehicle communications (VC) has become one of the major necessities for intelligent vehicles. However, VC suffers from serious security problems that hinder its commercialization. Hence, the IEEE 1609 Wireless Access Vehicular Environment (WAVE) protocol defines a security service for VC. This service includes Advanced Encryption Standard-Counter with CBC-MAC (AES-CCM) for data encryption in VC. A high-speed AES-CCM crypto module is necessary, because VC requires a fast communication rate between vehicles. In this study, we propose and implement an efficient AES-CCM hardware architecture for high-speed VC. First, we propose a 32-bit substitution table (S_Box) to reduce the AES module latency. Second, we employ key box register files to save key expansion results. Third, we save the input and processed data to internal register files for secure encryption and to secure data from external attacks. Finally, we design a parallel architecture for both cipher block chaining message authentication code (CBC-MAC) and the counter module in AES-CCM to improve performance. For implementation of the field programmable gate array (FPGA) hardware, we use a Xilinx Virtex-5 FPGA chip. The entire operation of the AES-CCM module is validated by timing simulations in Xilinx ISE at a speed of 166.2 MHz.

• Journal of information and communication convergence engineering
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• v.14 no.1
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• pp.26-34
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• 2016

The alignment of DNA sequences is one of the important processes in the field of bioinformatics. The Smith-Waterman algorithm (SWA) performs optimally for aligning sequences but is computationally expensive. Field programmable gate array (FPGA) performs the best on parameters such as cost, speed-up, and ease of re-configurability to implement SWA. The performance of FPGA-based SWA is dependent on efficient cell-basic implementation-unit design. In this paper, we present an optimized systolic cell design while avoiding oversimplification, very large-scale integration (VLSI)-level design, and direct mapping of iterative equations such as previous cell designs. The proposed design makes efficient use of hardware resources and provides portability as the proposed design is not based on gate-level details. Our cell design implementing a linear gap penalty resulted in a performance improvement of 32× over a GPP platform and surpassed the hardware utilization of another implementation by a factor of 4.23.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.7 no.11
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• pp.2769-2792
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• 2013

In this paper, we propose an authenticated key agreement scheme, TinyIBAK, based on the identity-based cryptography and bilinear paring, for large scale sensor networks. We prove the security of our proposal in the random oracle model. According to the formal security validation using AVISPA, the proposed scheme is strongly secure against the passive and active attacks, such as replay, man-in-the middle and node compromise attacks, etc. We implemented our proposal for TinyOS-2.1, analyzed the memory occupation, and evaluated the time and energy performance on the MICAz motes using the Avrora toolkits. Moreover, we deployed our proposal within the TOSSIM simulation framework, and investigated the effect of node density on the performance of our scheme. Experimental results indicate that our proposal consumes an acceptable amount of resources, and is feasible for infrequent key distribution and rekeying in large scale sensor networks. Compared with other ID-based key agreement approaches, TinyIBAK is much more efficient or comparable in performance but provides rekeying. Compared with the traditional key pre-distribution schemes, TinyIBAK achieves significant improvements in terms of security strength, key connectivity, scalability, communication and storage overhead, and enables efficient secure rekeying.

• Journal of Internet Computing and Services
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• v.9 no.5
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• pp.1-7
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• 2008

This paper explains a new design and Implementation of an efficient portable braille point system for visually Impaired person, The information systems for the visually impaired persons require efficiently designed devices, tools and accessibility to use the devices, and education support. These three conditions are the basic requirements of designing systems for the visually impaired persons, The system proposed in this paper satisfies the above three conditions. The system converts data and web documents between the braille and Hangul using an algorithm stored in a PC, and transfers the converted data to portable devices. And the portable braille device presents the transferred data in an electromagnetic way.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.4
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• pp.888-894
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• 2015

This paper describes an efficient hardware design of Lightweight Encryption Algorithm (LEA) developed by National Security Research Institute(NSRI). The LEA crypto-processor supports for master key of 128-bit. To achieve small-area and low-power implementation, an efficient hardware sharing is employed, which shares hardware resources for encryption and decryption in round transformation block and key scheduler. The designed LEA crypto-processor was verified by FPGA implementation. The LEA core synthesized with Xilinx ISE has 1,498 slice elements, and the estimated throughput is 216.24 Mbps with 135.15 MHz.

• Journal of Information Technology Services
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• v.10 no.2
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• pp.61-74
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• 2011

SMEs(Small and Medium-sized Enterprises) have implemented the various IT-based Production Information Systems(PIS) to cope with the highly competitive environment as well as to improve their competitiveness and productivity. For the efficient development of PIS In SMEs, standardizing the system development process is required. Methodology for the development of PIS is especially important for the systematic and efficient implementation to communicate among the SI companies, SMEs, and a supervision agency. TIPA(Korea Technology and Information Promotion Agency for SMEs) has developed PSDM(Production System Development Methodology), and supplies it to the SI companies. The research goal of this paper is to explore the productivity improvement by adopting the PSDM with the cases of SI companies applied PSDM. The results show that such benefits as risk management, productivity improvement, easy system implementation and maintenance are perceived by PSDM Users. This research could be the first case study reveal the effectiveness of PSDM. For further research, the survey could be carried out with more samples.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2004.10a
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• pp.382-387
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• 2004

As the increasing needs in the industrial filed, many studies for the 3D CAD system are carried out. There are two types of 3D CAD system. One is manifold modeler, the other is non-manifold modeler. In the manifold modeler only 3D objects can be modeled. In the non-manifold modeler 3D, 2D, 1D, and 0D objects can be modeled in a unified data structure. Recently there are many studies on the non-manifold modeler. Most of them are focused on finding unknown topological entities and representing all kinds of topological entities found. In this paper, efficient data structure is selected. The boundary information on a face and an edge is included in this data structure. The boundary information on a vertex is excluded considering the frequency of usage. Because the disk cycle information is not required in most case of modeling. It is compact. It stores essential non-manifold information such as loop cycle and radial cycle. A suitable Euler-Poincare equation is studied and selected. Using the efficient data structure and the selected Euler-Poincare equation, 18 basic Euler operators are implemented. Several 3D models are created using the implemented modeler. A non-manifold modeling can be carried out using the implemented 3D CAD system. The results of this paper could be used in the further studies such as an implementation of Boolean operators, and a translation of 2D CAD drawings to 3D models.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.151-154
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• 2008

For expression of isogram in mobile GIS environments, the client needs to receive the value data with the topographical map from a server. At this point, a client can't get the entire raw data because of the mobile characteristics. The approach to get representative points and to make isogram by interpolation methods, has some problems. The approach requires huge computing overhead at the client and doesn't guarantee the correctness of the isogram. In this paper, a data structure, algorithm and implementation results for efficient transmission of contour information to a client which is constructed from a elevation information at a server, are proposed.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.263-266
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• 2012

This paper describes an efficient hardware implementation of Whirlpool hash function as ISO/IEC 10118-3 standard. Optimized timing is achieved by using pipelined small LUTs, and Whirlpool block cipher and key schedule have been implemented in parallel for improving throughput. In key schedule, key addition is area-optimized by using inverters and muxes instead of using rom and xor gates. This hardware has been implemented on Virtex5-XC5VSX50T FPGA device. Its maximum operating frequency is about 151MHz, and throughput is about 950Mbps.

• Journal of Institute of Control, Robotics and Systems
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• v.12 no.5
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• pp.450-456
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• 2006

Monte Carlo localization is known to be one of the most reliable methods for pose estimation of a mobile robot. Although MCL is capable of estimating the robot pose even for a completely unknown initial pose in the known environment, it takes considerable time to give an initial pose estimate because the number of random samples is usually very large especially for a large-scale environment. For practical implementation of MCL, therefore, a reduction in sample size is desirable. This paper presents a novel approach to reducing the number of samples used in the particle filter for efficient implementation of MCL. To this end, the topological information generated through the thinning technique, which is commonly used in image processing, is employed. The global topological map is first created from the given grid map for the environment. The robot then scans the local environment using a laser rangefinder and generates a local topological map. The robot then navigates only on this local topological edge, which is likely to be similar to the one obtained off-line from the given grid map. Random samples are drawn near the topological edge instead of being taken with uniform distribution all over the environment, since the robot traverses along the edge. Experimental results using the proposed method show that the number of samples can be reduced considerably, and the time required for robot pose estimation can also be substantially decreased without adverse effects on the performance of MCL.