• Journal of Computing Science and Engineering
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• v.7 no.1
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• pp.30-43
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• 2013

Multicore and multiprocessor systems with dynamic voltage scaling architectures are being used as one of the solutions to satisfy the growing needs of high performance applications with low power constraints. An important aspect that has propelled this solution is effective task/application scheduling and mapping algorithms for multiprocessor systems. This work proposes an energy aware, offline, probability-based unified scheduling and mapping algorithm for multiprocessor systems, to minimize the number of processors used, maximize the utilization of the processors, and optimize the energy consumption of the multiprocessor system. The proposed algorithm is implemented, simulated and evaluated with synthetic task graphs, and compared with classical scheduling algorithms for the number of processors required, utilization of processors, and energy consumed by the processors for execution of the application task graphs.

• Journal of the Semiconductor & Display Technology
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• v.18 no.1
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• pp.123-128
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• 2019

Currently mobile services are on the verge of full commercialization ahead of 5G mobile communication (5G). The first goal could be to preempt the 5G market through realistic media services utilizing VR (Virtual Reality) and AR (Augmented Reality) technologies that users can most easily experience. Basically this movement is based on the advanced development of smart devices and high quality graphics processing computing power of mobile application processors. Accordingly, the importance of mobile GPUs is emerging and the most concern issue becomes a model for predicting the power and performance for smooth operation of high quality mobile contents. In many cases, the performance of mobile GPUs has been introduced in terms of power consumption of mobile GPUs using dynamic voltage and frequency scaling and throttling functions for power consumption and heat management. This paper introduces several studies of mobile GPU performance prediction model with user-friendly methods not like conventional power centric performance prediction models.

• Proceedings of the Korea Information Processing Society Conference
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• 2009.04a
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• pp.853-855
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• 2009

센서 노드를 위한 운영체제는 제한된 시스템 자원 하에서 동작하므로 전력 소모량을 최소화 시킬 수 있는 시스템 레벨의 저전력 기법과 함께 실시간성을 지원해야 한다. 이에 본 논문에서는 저전력 마이크로프로세서인 ATmega128L 기반의 센서 노드 하드웨어 플랫폼을 설계하고, 센서노드 플랫폼에서 동작하는 멀티스레드 기반의 실시간 운영체제인 RT-UNOS를 개발하였다. 제안한 센서 노드 플랫폼의 동작 검증을 위하여 기존의 센서노드용 운영체제인 TinyOS와 MANTIS, cc-EDF와의 성능을 구현한 센서노드 상에서 실험을 진행하여 비교 분석하였다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.10
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• pp.5168-5181
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• 2017

The popularity of augmented reality (AR) applications and games are in high demand. Currently, the best common platform to implement AR services is on a smartphone, as online games, navigators, personal assistants, travel guides are among the most popular applications of smartphones. However, the power consumption of an AR application is extremely high, and therefore, highly adaptable and dynamic low power control schemes must be used. Dynamic voltage and frequency scaling (DVFS) schemes are widely used in smartphones to minimize the energy consumption by controlling the device's operational frequency and voltage. DVFS schemes can sometimes lead to longer response times, which can result in a significant problem for AR applications. In this paper, an AR response time monitor is used to observe the time interval between the AR image input and device's reaction time, in order to enable improved operational frequency and AR application process priority control. Based on the proposed response time monitor and the characteristics of the Linux kernel's completely fair scheduler (CFS) (which is the default scheduler of Android based smartphones), a response time step control (RSC) scheme is proposed which adaptively adjusts the CPU frequency and interactive application's priority. The experimental results show that RSC can reduce the energy consumption up to 10.41% compared to the ondemand governor while reliably satisfying the response time performance limit of interactive applications on a smartphone.

• The Journal of the Korea Contents Association
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• v.15 no.1
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• pp.31-43
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• 2015

For battery based real-time embedded systems, high performance to meet their real-time constraints and energy efficiency to extend battery life are both essential. Real-Time Dynamic Voltage Scaling (RT-DVS) has been a key technique to satisfy both requirements. In this paper, we present an efficient RT-DVS algorithm called EccEDF that is designed based on ccEDF. The proposed algorithm can precisely calculate the maximum unused utilization with consideration of the elapsed time while keeping the structural simplicity of ccEDF, which overlooked the time needed to run the task in calculating the available slack. The maximum unused utilization can be calculated by dividing remaining execution time($C_i-cc_i$) by remaining time($P_i-E_i$) on completion of the task and it is proved using Fluid scheduling model. We also show that the algorithm outperforms ccEDF in practical applications which is modelled using a PXA250 and a 0.28V-to-1.2V wide-operating-range IA-32 processor model.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.4 s.304
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• pp.167-176
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• 2005

This paper proposes a new power minimization technique for the frame-based multimedia signal processing. The derivation of the technique is based on the newly proposed microscopic DVS(Dynamic Voltage Scaling) method, where, the operating frequency and the supply voltage levels are dynamically controlled according to the processing requirement for each frame of multimedia data. The multimedia signal processing algorithms are also redesigned and optimized to maximize the power saving efficiency of the microscopic DVS technology. The characterization of the mean/variance distribution of the processing load in the frame-based multimedia signal processing provides the major basis not only for the optimized application of the microscopic DVS technology but also for the optimization of the multimedia algorithms. The power saying efficiency of the proposed DVS approach is experimentally tested with the algorithms of MPEG-2 video decoder and MPEG-2 AAC audio encoder on the ARM9 RISC processor. The experimental results with the diverse MPEG-2 video and audio files show The average power saving efficiencies of 50$\%$ and 30$\%$, respectively. The results also agree very well with those of the analytic derivations.

• Journal of Korea Multimedia Society
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• v.8 no.8
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• pp.1042-1050
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• 2005

This paper proposed a novel low-power video decoding scheme for mobile multimedia communication. In general, there are quite a large number of non-coded blocks in the encoded bitstream where all quantized DCT coefficients are truncated into zero. When the number of the non-coded blocks are known at the start of frame decoding, the amount of computation reduction can be precisely estimated for frame decoding. When the computation reduces, the operation speed and the corresponding supply voltage of VLSI circuits in the decoder also reduce, thus thus power consumption also reduces. In the proposed scheme, the number of the non-coded blocks is stored in the frame header of the encoded bitstream, and the decoder efficiently reduces the power consumption exploiting this information. Simulation results show that the proposed scheme reduces the power consumption to about 1/20.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.155-158
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• 2005

An invesitigation on power consumption of a mobile multimedia system using OFDM and MDVS technique is reported here. Analysis and simulation are performed to find the significances of proposed Microscopic Dynamic Voltage Scaling(MDVS) tehnique[4] on digital processor in terms of power saving. A study is also made to show power reduction in mobile multimedia system by incorporating OFDM modulation scheme in RF front-end. Finally, overall power consumption by functionally distinguished blocks ie. RF front-end, digital processor and human interface unit is shown here. Total power consumption is 8.2W for 2Mbps SD-quality WCDMA multimedia video service - the power consumption of digital processor is 3.9W(48%), the power consumption of RF front-end is 3.2W (36%), and the power consumption of interface is 1.8W(16%). Power saving of applying purposed MDVS technique is 35% in digital processor, and power saving of OFDM technique is 10-12dB in RF front-end.

• KIPS Transactions on Computer and Communication Systems
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• v.2 no.6
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• pp.237-244
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• 2013

We propose Energy-constrained Multiprocessor Real-Time Scheduling algorithms for (m,k)-firm deadline constrained tasks (EMRTS-MK). Rather than simply saving as much energy as possible, we consider energy as hard constraint under which the system remains functional and delivers an acceptable performance at least during the prescribed mission time. We evaluate EMRTS-MKs in several experiments, which quantitatively show that they achieve the scheduling objectives.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.1C
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• pp.149-156
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• 2004

In this paper, novel power-aware motion estimation is proposed for low-power multimedia communication. In the video compression, motion estimation dominates the total power consumption, where better performance usually requires more power consumption. Among several motion estimation algorithms with different performance and power, the proposed motion estimation adaptively selects the optimal algorithm during run-time, considering the trade-off between performance and power. The proposed motion estimation can be easily applied to various motion estimation algorithms with negligible computation or hardware overhead. According to simulation results, the proposed motion estimation reduces the power consumption to 1/15.7~1/5.6 without performance degradation, when compared to the conventional algorithms.