• Computers and Concrete
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• v.3 no.5
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• pp.301-312
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• 2006

Experimental research revealed that the spatial dispersion of aggregate grains exerts pronounced influences on the mechanical and durability properties of concrete. Therefore, insight into this phenomenon is of paramount importance. Experimental approaches do not provide direct access to three-dimensional spacing information in concrete, however. Contrarily, simulation approaches are mostly deficient in generating packing systems of aggregate grains with sufficient density. This paper therefore employs a dynamic simulation system (with the acronym SPACE), allowing the generation of dense random packing of grains, representative for concrete aggregates. This paper studies by means of SPACE packing structures of aggregates with a Fuller type of size distribution, generally accepted as a suitable approximation for actual aggregate systems. Mean free spacing $\bar{\lambda}$, mean nearest neighbour distance (NND) between grain centres $\bar{\Delta}_3$, and the probability density function of ${\Delta}_3$ are used to characterize the spatial dispersion of aggregate grains in model concretes. Influences on these spacing parameters are studied of volume fraction and the size range of aggregate grains. The values of these descriptors are estimated by means of stereological tools, whereupon the calculation results are compared with measurements. The simulation results indicate that the size range of aggregate grains has a more pronounced influence on the spacing parameters than exerted by the volume fraction of aggregate. At relatively high volume density of aggregates, as met in the present cases, theoretical and experimental values are found quite similar. The mean free spacing is known to be independent of the actual dispersion characteristics (Underwood 1968); it is a structural parameter governed by material composition. Moreover, scatter of the mean free spacing among the serial sections of the model concrete in the simulation study is relatively small, demonstrating the sample size to be representative for composition homogeneity of aggregate grains. The distribution of ${\Delta}_3$ observed in this study is markedly skew, indicating a concentration of relatively small values of ${\Delta}_3$. The estimate of the size of the representative volume element (RVE) for configuration homogeneity based on NND exceeds by one order of magnitude the estimate for structure-insensitive properties. This is in accordance with predictions of Brown (1965) for composition and configuration homogeneity (corresponding to structure-insensitive and structure-sensitive properties) of conglomerates.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.4 s.304
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• pp.167-176
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• 2005

This paper proposes a new power minimization technique for the frame-based multimedia signal processing. The derivation of the technique is based on the newly proposed microscopic DVS(Dynamic Voltage Scaling) method, where, the operating frequency and the supply voltage levels are dynamically controlled according to the processing requirement for each frame of multimedia data. The multimedia signal processing algorithms are also redesigned and optimized to maximize the power saving efficiency of the microscopic DVS technology. The characterization of the mean/variance distribution of the processing load in the frame-based multimedia signal processing provides the major basis not only for the optimized application of the microscopic DVS technology but also for the optimization of the multimedia algorithms. The power saying efficiency of the proposed DVS approach is experimentally tested with the algorithms of MPEG-2 video decoder and MPEG-2 AAC audio encoder on the ARM9 RISC processor. The experimental results with the diverse MPEG-2 video and audio files show The average power saving efficiencies of 50$\%$ and 30$\%$, respectively. The results also agree very well with those of the analytic derivations.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.2
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• pp.94-99
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• 2010

This paper presents a charge pump architecture for correcting the current mismatch due to the PVT variation. In general, the current mismatch of the charge pump should be minimized to improve the phase noise and spur performance of the PLL. In order to correct the current mismatch of the charge pump, the current difference is detected by the replica charge pump and fed back into the main charge pump. This scheme is very simple and guarantees the high accuracy compared with the prior works. Also, it shows a good dynamic performance because the mismatch is corrected continuously. It is implemented in 0.13um CMOS process and the die area is $100{\mu}m\;{\times}\;160{\mu}m$. The voltage swing is from 0.2V to 1V at supply voltage of 1.2V. The charging and discharging currents are $100{\mu}A$, respectively and the current mismatch due to the PVT variation is less than 1%.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.3
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• pp.60-68
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• 2008

This work describes a re-configurable 10MS/s to 100MS/s, low-power 10b two-step pipeline ADC operating at a power supply from 0.5V to 1.2V. MOS transistors with a low-threshold voltage are employed partially in the input sampling switches and differential pair of the SHA and MDAC for a proper signal swing margin at a 0.5V supply. The integrated adjustable current reference optimizes the static and dynamic performance of amplifiers at 10b accuracy with a wide range of supply voltages. A signal-isolated layout improves the capacitor mismatch of the MDAC while a switched-bias power-reduction technique reduces the power dissipation of comparators in the flash ADCs. The prototype ADC in a 0.13um CMOS process demonstrates the measured DNL and INL within 0.35LSB and 0.49LSB. The ADC with an active die area of $0.98mm^2$ shows a maximum SNDR and SFDR of 56.0dB and 69.6dB, respectively, and a power consumption of 19.2mW at a nominal condition of 0.8V and 60MS/s.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.3
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• pp.69-76
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• 2008

This work proposes a 12b 1kS/s 65uA 0.35um CMOS algorithmic ADC for sensor interface applications such as accelerometers and gyro sensors requiring high resolution, ultra-low power, and small size simultaneously. The proposed ADC is based on an algorithmic architecture with recycling techniques to optimize sampling rate, resolution, chip area, and power consumption. Two versions of ADCs are fabricated with a conventional open-loop sampling scheme and a closed-loop sampling scheme to investigate the effects of offset and 1/f noise during dynamic operation. Switched bias power-reduction techniques and bias circuit sharing reduce the power consumption of amplifiers in the SHA and MDAC. The current and voltage references are implemented on chip with optional of-chip voltage references for low-power SoC applications. The prototype ADC in a 0.35um 2P4M CMOS technology demonstrates a measured DNL and INL within 0.78LSB and 2.24LSB, and shows a maximum SNDR and SFDR of 60dB and 70dB in versionl, and 63dB and 75dB in version2 at 1kS/s. The versionl and version2 ADCs with an active die area of $0.78mm^2$ and $0.81mm^2$ consume 0.163mW and 0.176mW at 1kS/s and 2.5V, respectively.

• Journal of IKEEE
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• v.14 no.2
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• pp.51-57
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• 2010

A CMOS rail-to-rail high voltage buffer amplifier is proposed to drive the gamma correction reference voltage of large TFT LCD panels. It is operating by a single supply and only shows current consumption of 0.5mA at 18V power supply voltage. The circuit is designed to drive the gamma correction voltage of 8-bit or 10-bit high resolution TFT LCD panels. The buffer has high slew rate, 0.5mA static current and 1k$\Omega$ resistive and capacitive load driving capability. Also, it offers wide supply range, offset voltages below 50mV at 5mA constant output current, and below 2.5mV input referred offset voltage. To achieve wide-swing input and output dynamic range, current mirrored n-channel differential amplifier, p-channel differential amplifier, a class-AB push-pull output stage and a input level detector using hysteresis comparator are applied. The proposed circuit is realized in a high voltage 0.18um 18V CMOS process technology for display driver IC. The circuit operates at supply voltages from 8V to 18V.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.8 no.5
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• pp.38-47
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• 2009

This paper aims to evaluate the freeway traffic management Strategy based on exTMS according to traffic situation of freeway. As freeway user's demands increase, we thus need future-oriented and optimized traffic management. So, through improving the existing system and introducing the advanced system, these systems evaluate for not only preparing the application in real world but also preliminary feasibility. To evaluate effects of the traffic management based on exTMS, in this study, shoulder LCS, advanced VMS(assumption in it is improving next-generation system which it can be offering diverse dynamic traffic information), Ramp-metering system are applicated in simulation. In addition, this study evaluates the effect when all proposed systems are applicated, and compare the individual effect of when independent system is applicated, through considering about traffic condition of V/C=0.5, V/C=0.8, V/C=1.2. The study results show that all assumed cases, the travel speed were improved according to the increasing V/C. Furthermore, the results of evaluated the individual system show that the shoulder LCS was found to be the largest effect, and the effect of VMS(detour rate is 11%) is larger than the other cases.

• Journal of the Korean Geographical Society
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• v.28 no.2
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• pp.163-178
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• 1993

The purpose of this paper is to provide a better understanding of the unprecedented reform movement of geographic education in the United States since 1980 and extract some implications from this movement for geographic education in Korea. For the purpose, the history to this movement was reviewed through following three stages. In the first stage(1980~1984: form :HSGP" to :"Guideline"), the voluntary improvement movement appeared at California and the orgni-zational movement began in 1982 such as the Committee on Geography and International Knowledge. The national educational refrom imperatives, presented at "A Nation at Risk", and "Back to Basics" movement provided good opportunities to resurrect geography as a basic subject. For next real resurrection movement, the very important document "Guidelines for Geographic Education" was published at 1984. In the second stage(1985~1989: from "Guide-lines" to "Public"), the "Guideline" gave power-full motives and foci for reconstructiong the contents of geography, especially by the five fundamental themes(Location, Place, Relation-ships within Places, Movement, and Region). Also GENIP as the symbol of unity of all four major geography organization(AAG, NCGE, NGS, AGS) contributed to expanding and stren-gthening geography education. Also Geography Educagtion Program of NGS was a smart and well organized program to improve geographic education through it's a five strategies: Grass-roots organization(Alliances), Teacher education, Pu-blic awareness, Educational materials develo-pment, Targeted outreach to education decision-makers. In the late 1980s, the last focus of movement was the Public awareness and Edua-ction decision-making. In the third stage(1990-present: from "Public" to "Core Subject"), the initiative pendulum swung from geography organization to nation curricu-lum. In this National Curriculum, Geography was approved as a "Core Subject" and The 1994 National Geography Assessment Framework was constructed to assess the outcome of student's education in geography in grades, 4,8, and 12. Some Implications extracted from the process and contents of renaissance movement of geogr-aphic education in the Uinted States since 1980 are as follows. First, It shows the importance of the unity and target assignment among the geography organization. Second, interactive relationship between the academic geography and school geography develops each other. Third, teacher education, including pre-service education, including pre-service education and in-service education, is a key element to improve the quality of geography. And teacher organization is a good clearing house to exchange information for good geography. Forth, the positive and active response to changes in socketies such as globalism and inter-nationalizing, national education policy, and the trend of pedagogy is needed to rejuvenate geo-graphic education. Above all, we need to establish a well organized and powerfull program, sophisticated activities strategies, and long-term implementa-tion plan if we want more and better school geography.

• The Korean Journal of Financial Management
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• v.27 no.1
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• pp.1-30
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• 2010

This paper tested the lead-lag relationship as well as the symmetric and asymmetric volatility spillover effects between international currency futures markets and cash markets. We use five kinds of currency spot and futures markets such as British pound, Australian and Canadian dollar, Brasilian Real and won/dollar spot and futures markets. daily closing prices covering from September 15, 2003 to July 30, 2009. For this purpose we employed dynamic time series models such as the Granger causality based on VAR and time-varying MA(1)-GJR-GARCH(1, 1)-M. The main empirical results are as follows; First, according to Granger causality test, we find that the bilateral lead-lag relationship between the five countries' currency spot and futures market. The price discover effect from currency futures markets to spot market is relatively stronger than that from currency spot to futures markets. Second, based on the time varying GARCH model, we find that there is a bilateral conditional mean spillover effects between the five currency spot and futures markets. Third, we also find that there is a bilateral asymmetric volatility spillover effects between British pound, Canadian dollar, Brasilian Real and won/dollar spot and futures market. However there is a unilateral asymmetric volatility spillover effect from Australian dollar futures to cash market, not vice versa. From these empirical results we infer that most of currency futures markets have a much better price discovery function than currency cash market and are inefficient to the information.

• The Journal of Information Technology and Database
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• v.5 no.1
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• pp.97-108
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• 1998

This paper proposes a conceptual taxonomy of architectures for workflow management systems. The systematic classification work is based on a framework for workflow architectures. The framework, consisting of generic-level, conceptual-level and implementation-level architectures, provides common architectural principles for designing a workflow management system. We define the taxonomy by considering the possibilities for centralization or distribution of data, control, and execution. That is, we take into account three criteria. How are the major components of a workflow model and system, like activities, roles, actors, and workcases, concretized in workflow architecture. Which of the components is represented as software modules of the workflow architecture\ulcorner And how are they configured and operating in the architecture\ulcorner The workflow components might be embodied, as active (processes or threads) modules or as passive (data) modules, in the software architecture of a workflow management system. One or combinations of the components might become software modules in the software architecture. Finally, they might be centralized or distributed. The distribution of the components should be broken into three: Vertically, Horizontally and Fully distributed. Through the combination of these aspects, we can conceptually generate about 64 software Architectures for a workflow management system. That is, it should be possible to comprehend and characterize all kinds of software architectures for workflow management systems including the current existing systems as well as future systems. We believe that this taxonomy is a significant contribution because it adds clarity, completeness, and global perspective to workflow architectural discussions. The vocabulary suggested here includes workflow levels and aspects, allowing very different architectures to be discussed, compared, and contrasted. Added clarity is obtained because similar architectures from different vendors that used different terminology and techniques can now be seen to be identical at the higher level. Much of the complexity can be removed by thinking of workflow systems. Therefore, it is used to categorize existing workflow architectures and suggest a plethora of new workflow architectures. Finally, the taxonomy can be used for sorting out gems and stones amongst the architectures possibly generated. Thus, it might be a guideline not only for characterizing the existing workflow management systems, but also for solving the long-term and short-term architectural research issues, such as dynamic changes in workflow, transactional workflow, dynamically evolving workflow, large-scale workflow, etc., that have been proposed in the literature.