• 한국통신학회:학술대회논문집
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• 한국통신학회 1987년도 춘계학술발표회 논문집
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• pp.230-233
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• 1987

A Dual Disital Phase Locked Loop is analyzeddesigned and tested. Two specific confisurations are considered generations second and thisrd order DPLL’s and it is found using a computer simulation and verified therretically . As a result of computer simulation the characteristcof designed I-Dullis better than the at of P-DPLL or C-Dull

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1995년도 추계학술대회 논문집
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• pp.437-441
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• 1995

In this paper, the ultra precision positioning system for servo motor and piezo actuator using dual servo loop control has been developed. For positioning system having long distance with ultra precision, the combination of global stage and micro stage is required. Servo moter and ball screw are used as a master stage and piezo acuator as a fine stage. By using this system, an positional precision witin .+-. 30nm has been achieved at dual servo loop control. When using micro stage, an positional precision within .+-. 10nm has been achieved. This result can be applied to develop semiconductor equipment such as wafer stepper.

• Journal of electromagnetic engineering and science
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• 제17권4호
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• pp.197-201
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• 2017

In this paper, we present a novel design for a dual-band bandpass filter (BPF) based on the conventional second-order, open-loop BPF. By adding series resonant circuits to the open ends of the resonator, we can create two resonant modes from the even and odd modes. One pair of the even and odd modes constitutes the upper passband, while the other pair constitutes the lower passband. By adding another series resonant circuit to the open-loop resonator, we can control the bandwidth of either the upper passband or the lower passband. We can replace the series resonant circuits with simple microstrip line resonators. A dual-band BPF working at both Wi-Fi bands (2.4 GHz and 5.8 GHz bands) is designed based on the proposed method and is tested. The measured and simulated results show excellent agreement.

• Journal of Electrical Engineering and Technology
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• 제9권4호
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• pp.1365-1368
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• 2014

A CPW-fed to CPS dipole antenna of triangular loop director by microstrip tapered balun is proposed for dual and wide band operations, in this paper. The proposed antenna is consisted of a CPW-fed to CPS transform, microstrip tapered balun element, CPS dipole driver and triangular loop director. A dual and wide bandwidth of the proposed dipole antenna is realized by introducing the triangular loop director and taper matching element. The operated frequency bandwidth is 1GHz (2.14~3.14 GHz) and 1.9 GHz (4.6~6.5 GHz) to return loss criterion of less than 10 dB. The measured return loss of the proposed antenna showed good results of the dual and wide band operating frequency and the radiation pattern. The proposed antenna is able to support WLAN wireless communications applications.

• Journal of Power Electronics
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• 제11권2호
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• pp.113-119
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• 2011

This paper presents a DSP based direct digital control design and implementation for a high power boost converter. A single loop and dual loop voltage control are digitally implemented and compared. The real time workshop (RTW) is used for automatic real-time code generation. Experimental results of a 20 kW boost converter based on the TMS320F2808 DSP during reference voltage changes, input voltage changes, and load disturbances are presented. The results show that the dual loop control achieves better steady state and transient performance than the single loop control. In addition, the experimental results validate the effectiveness of using the RTW for automatic code generation to speed up the system implementation.

• 전기전자학회논문지
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• 제17권1호
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• pp.16-21
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• 2013

최근 주파수 합성기는 협대역으로 설계를 하거나 광대역 주파수 합성기의 경우 이중루프구조로 설계하여 위상잡음을 줄이는 방식을 사용하고 있다. 그러나 이중루프구조의 주파수 합성기는 전압제어발진기의 중심주파수 불일치와 추가적인 루프를 필요로 하는 단점을 가지고 있다. 본 논문에서는 800Mhz ~ 3Ghz를 지원하는 새로운 구조의 단일루프 형태의 다중제어 광대역 주파수 합성기를 제안한다. 본 논문의 주파수 합성기의 전압제어발진기는 Coarse 제어 전압과 Fine제어전압을 고정되며, 최종적으로 낮은 Kvco를 가지게 된다. 주파수 합성기의 모의실험은 UMC $0.11{\mu}m$ 공정에서 검증하였으며, 제안된 주파수 합성기는 다양한 응용분야에 사용될 수 있을 것으로 기대된다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.163-166
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• 1999

In this paper, frequency synthesizer that can be used in IMT-2000 was designed and fabricated using dual loop PLL(Phase Locked Loop). For improving phase noise characteristic Voltage Controlled Oscillator was fabricated using coaxial resonator and eliminated frequency divider using SPD as phase detector and increased open loop gain. Fabricated frequency synthesizer had 1.82㎓ center frequency, 160MHz tuning range and -119.73㏈c/Hz low phase noise characteristic.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2001년도 종합학술발표회 논문집 Vol.11 No.1
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• pp.157-160
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• 2001

본 논문에서 5.8GHz의 주파수 대역에서 사용할 수 있는 향상된 커플링 구조와 크기를 줄인 dual-mode microstrip bandpass filter를 설계하였다. 여기서 meander loop resonator를 쓰는 이유는 크기가 작고 방사 손실이 적으며 패턴이 간단하기 때문이다. 또한 이와 비슷한 특성을 갖는 ring, square patch, disk등은 불연속 성분을 가짐으로써 이중모드의 구현이 가능하다. 향상된 형태의 dual-mode microstrip bandpass filter의 변형된 T-shaped meander loop resonator를 소형으로 발전되고. 높은 선택도를 가지는 구조이다. 이 형태의 filter에서 150MHz의 bandwidth을 가지고 5.8GHz주파수를 가지는 구조로 설계하였다.

• 대한전자공학회논문지SD
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• 제45권5호
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• pp.65-70
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• 2008

본 논문에서는 루프 대역폭을 조절하여 빠른 위상 고정 시간을 갖는 새로운 구조의 이중 루프 위상고정루프를 제안하였다. 위상고정루프가 out-lock 상태일 때는 채널 간격의 1/10보다 더 큰 대역폭을 갖도록 하였으며, in-lock 부근에서는 채널 간격의 1/10 보다 더 작은 좁은 대역폭을 갖도록 하였다. 제안된 위상고정루프는 표준 CMOS $0.35{\mu}m$ 공정으로 HSPICE를 이용하여 설계 하였다. 시뮬레이션 결과 PLL의 대역폭을 200KHz 채널 간격 보다 14배 크게 하여 80MHz의 주파수를 변화시키는데 $50{\mu}s$의 빠른 위상고정 시간을 갖는 것으로 나타났다.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2003년도 ICCAS
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• pp.1836-1840
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• 2003

This paper, we propose a new phase-locked loop (PLL) system with the controllable output phase, independent from the output frequency, and lock-up time. This PLL system has a dual control loop is described, the inner loop greatly improved VCO characteristic such as faster speed response as well as higher operation bandwidth, to minimize the effect of the VCO noise and the power supply variation and also get better linearity of VCO output. The main loop is the heart of this PLL which greatly improved the output frequency instability due to the external high frequency noise coupling to the input reference frequency also the main loop can control the output phase, independent from the output frequency, and reduce the lock-up time of the step frequency response. The experimental results confirm the validity of the proposed strategy.