• Title/Summary/Keyword: Drain Work

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Fabrication and Characteristics of MOSFET Protein Sensor Using Nano SAMs (자기조립 단분자막을 이용한 MOSFET형 단백질 센서의 제작 및 특성)

  • Han, Seung-Woo;Park, Keun-Yong;Kim, Min-Suk;Kim, Hong-Seok;Bae, Young-Seuk;Choi, Sie-Young
    • Journal of Sensor Science and Technology
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    • v.13 no.2
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    • pp.90-95
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    • 2004
  • Protein and gene detection have been growing importance in medical diagnostics. Field effect transistor (FET) - type biosensors have many advantages such as miniaturization, standardization, and mass-production. In this work, we have fabricated metal-oxide-semiconductor (MOS) FET that operates as molecular recognitions based electronic sensor. Measurements were taken with the devices under phosphate buffered saline solution. The drain current ($I_{D}$) was decreased after forming self-assembled mono-layers (SAMs) used to capture the protein, which resulted from the negative charges of SAMs, and increased after forming protein by 11.5% at $V_{G}$ = 0 V due to the positive charges of protein.

Bi-directional Two Terminal Switching Device with Metal/P/N+or Metal/N/P+ Junction

  • Kil, Gyu-Hyun;Lee, Sung-Hyun;Yang, Hyung-Jun;Lee, Jung-Min;Song, Yun-Heub
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.386-386
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    • 2012
  • We studied a bilateral switching device for spin transfer torque (STT-MRAM) based on 3D device simulation. Metal/P/N+or Metal/N/P+ junction device with $30{\times}30nm2$ area which is composed of one side schottky junction at Metal/P/N+ and Metal/N/P+ provides sufficient bidirectional current flow to write data by a drain induced barrier lowering (DIBL). In this work, Junction device confirmed that write current is more than 30 uA at 2 V, It is also has high on-off ratio over 105 under read operation. Junction device has good process feasibility because metal material of junction device could have been replaced by bottom layer of MTJ. Therefore, additional process to fabricate two outer terminals is not need. so, it provides simple fabrication procedures. it is expected that Metal/P/N+ or Metal/N/P+ structure with one side schottky junction will be a promising switch device for beyond 30 nm STT-MRAM.

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Bi-directional Two Terminal Switching Device based on SiGe for Spin Transfer Torque (STT) MRAM

  • Yang, Hyung-Jun;Kil, Gyu-Hyun;Lee, Sung-Hyun;Song, Yun-Heub
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.385-385
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    • 2012
  • A two terminal N+/P/N+ junction device to replace the conventional selective transistor was studied as a bilateral switching device for spin transfer torque (STT) MRAM based on 3D device simulation. An N+/P/N+ junction structure with $30{\times}30nm$ area requires bi-directional current flow enough to write a data by a drain induced barrier lowering (DIBL) under a reverse bias at N+/P (or P/N+ junction), and high current on/off ratio of 106. The SiGe materials are widely used in hetero-junction bipolar transistors, bipolar compensation metal-oxide semiconductors (BiCMOS) since the band gap of SiGe materials can be controlled by changing the fraction and the strain epilayers, and the drift mobility is increased with the increasing Ge content. In this work, N+/P/N+ SiGe material based junction provides that drive current is increased from 40 to $130{\mu}A$ by increased Ge content from 10~80%. When Ge content is about 20%, the drive current density of SiGe device substantially increased to 2~3 times better than Si-based junction device in case of 28 nm P length, which is sufficient current to operation of STT-MRAM.

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A STUDY ON THE ELECTRICAL CHARACTERISTICS OF ORGANIC THIN FILM TRANSISTORS WITH SURFACE-TREATED GATE DIELECTRIC LAYER (표면 처리한 $SiO_2$를 게이트 절연막으로 하는 박막 트랜지스터의 특성 연구)

  • Lee, Jae-Hyuk;Lee, Yong-Soo;Park, Jae-Hoon;Choi, Jong-Sun;Kim, Eu-Gene
    • Proceedings of the KIEE Conference
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    • 2000.11c
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    • pp.455-457
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    • 2000
  • In this work the electrical characteristics of organic TFTs with the semiconductor-insulator interfaces, where the gate dielectrics were treated by the two methods which are the deposition of Octadecyltrichlorosilane (OTS) on the insulator and rubbing the insulator surface. Pentacene is used as an active semiconducting layer. The semiconductor layer of pentacene was thermally evaporated in vacuum at a pressure of about $2{\times}10^{-7}$ Torr and at a deposition rate of $0.3{\AA}/sec$. Aluminum and gold were used for the gate and source/drain electrodes. OTS is used as a self-alignment layer between $SiO_2$ and pentacene. The gate dielectric surface was rubbed before pentacene is deposited on the insulator. In order to confirm the changes of the surface morphology the atomic force microscopy (AFM) was utilized. The characteristics of the fabricated TFTs are measured to clarify the effects of the surface treatment.

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An experimental study of defrosting behaviors on the fin-tube heat exchanger with PTC heating sheet (PTC 전열시트를 사용한 핀-관 열교환기의 제상 특성에 관한 실험적 연구)

  • Jhee, S.;Lee, K.S.
    • Korean Journal of Air-Conditioning and Refrigeration Engineering
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    • v.11 no.1
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    • pp.147-155
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    • 1999
  • In this work, the defrosting characteristics of PTC heating sheet used as a defrosting heat source of fin-tube heat exchanger in a refrigerator have been experimentally compared with those of conventional electric heater. It is found that the characteristics of water draining rate with defrosting time show smoothly oscillating pattern when PTC heating sheet is used, and the drained water is completely melted. The defrosting efficiency of the PTC heating sheet is about 75%, which represents about 25% higher than that of the electric heater. A reduction of defrosting time and an increase of defrosting efficiency may be obtained by improving the arrangement of heating elements of the heating sheet. It is shown that the defrosting time of PTC heating sheet increases linearly with the amount of frost, however the defrosting efficiency is nearly constant. In the application to the refrigerating system, one should notice the fact that the defrosting performance of PTC heating sheet may be defraded due to the repeated operations.

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An Energy Efficient Re-clustering Algorithm in Wireless Sensor Networks (무선센서네트워크에서의 에너지 효율적인 재클러스터링 알고리즘)

  • Park, Hye-bin;Joung, Jinoo
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.15 no.3
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    • pp.155-161
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    • 2015
  • Efficient energy consumption is a one of the key issues in wireless sensor networks. Clustering-based routing algorithms have been popular solutions for such an issue. Re-clustering is necessary for avoiding early energy drain of cluster head nodes in such routing strategies. The re-clustering process itself, however, is another source of energy consumption. It is suggested in this work to adaptively set the frequency of re-clustering by comparing the energy levels of cluster heads and a threshold value. The algorithm keeps the clusters if all the cluster heads' energy levels are greater than the threshold value. We confirm through simulations that the suggested algorithm shows better energy efficiency than the existing solutions.

Organic Thin Film Transistor Fabricated with Soluble Pentacene Active Channel Layer and NiOx Electrodes

  • Han, Jin-Woo;Kim, Young-Hwan;Kim, Byoung-Yong;Han, Jeong-Min;Moon, Hyun-Chan;Park, Kwang-Bum;Seo, Dae-Shik
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.395-395
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    • 2007
  • We report on the fabrication of soluble pentacene-based thin-film transistors (TFTs) that consist of $NiO_x$, poly-vinyl phenol (PVP), and Ni for the source-drain (SID) electrodes, gate dielectric, and gate electrode, respectively. The $NiO_x$ SID electrodes of which the work function is well matched to that of soluble pentacene are deposited on a soluble pentacenechannel by sputter deposited of NiO powder and show a moderately low but still effective transmittance of ~65% in the visible range along with a good sheet resistance of ${\sim}40{\Omega}/{\square}$. The maximum saturation current of our soluble pentacene-based TFT is about $15{\mu}A$ at a gate bias of -40showing a high field effect mobility of $0.06cm^2/Vs$ in the dark, and the on/off current ratio of our TFT is about $10^4$. It is concluded that jointly adopting $NiO_x$ for the S/D electrodes and PVP for gate dielectric realizes a high-quality soluble pentacene-based TFT.

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Design and Analysis of AlGaN/GaN MIS HEMTs with a Dual-metal-gate Structure

  • Jang, Young In;Lee, Sang Hyuk;Seo, Jae Hwa;Yoon, Young Jun;Kwon, Ra Hee;Cho, Min Su;Kim, Bo Gyeong;Yoo, Gwan Min;Lee, Jung-Hee;Kang, In Man
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.2
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    • pp.223-229
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    • 2017
  • This paper analyzes the effect of a dual-metal-gate structure on the electrical characteristics of AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors. These structures have two gate metals of different work function values (${\Phi}$), with the metal of higher ${\Phi}$ in the source-side gate, and the metal of lower ${\Phi}$ in the drain-side gate. As a result of the different ${\Phi}$ values of the gate metals in this structure, both the electric field and electron velocity in the channel become better distributed. For this reason, the transconductance, current collapse phenomenon, breakdown voltage, and radio frequency characteristics are improved. In this work, the devices were designed and analyzed using a 2D technology computer-aided design simulation tool.

Co-Deposition법을 이용한 Yb Silicide/Si Contact 및 특성 향상에 관한 연구

  • Gang, Jun-Gu;Na, Se-Gwon;Choe, Ju-Yun;Lee, Seok-Hui;Kim, Hyeong-Seop;Lee, Hu-Jeong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.438-439
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    • 2013
  • Microelectronic devices의 접촉저항의 향상을 위해 Metal silicides의 형성 mechanism과 전기적 특성에 대한 연구가 많이 이루어지고 있다. 지난 수십년에 걸쳐, Ti silicide, Co silicide, Ni silicide 등에 대한 개발이 이루어져 왔으나, 계속적인 저저항 접촉 소재에 대한 요구에 의해 최근에는 Rare earth silicide에 관한 연구가 시작되고 있다. Rare-earth silicide는 저온에서 silicides를 형성하고, n-type Si과 낮은 schottky barrier contact (~0.3 eV)를 이룬다. 또한, 비교적 낮은 resistivity와 hexagonal AlB2 crystal structure에 의해 Si과 좋은 lattice match를 가져 Si wafer에서 high quality silicide thin film을 성장시킬 수 있다. Rare earth silicides 중에서 ytterbium silicide는 가장 낮은 electric work function을 갖고 있어 낮은 schottky barrier 응용에서 쓰이고 있다. 이로 인해, n-channel schottky barrier MOSFETs의 source/drain으로써 주목받고 있다. 특히 ytterbium과 molybdenum co-deposition을 하여 증착할 경우 thin film 형성에 있어 안정적인 morphology를 나타낸다. 또한, ytterbium silicide와 마찬가지로 낮은 면저항과 electric work function을 갖는다. 그러나 ytterbium silicide에 molybdenum을 화합물로써 높은 농도로 포함할 경우 높은 schottky barrier를 형성하고 epitaxial growth를 방해하여 silicide film의 quality 저하를 야기할 수 있다. 본 연구에서는 ytterbium과 molybdenum의 co-deposition에 따른 silicide 형성과 전기적 특성 변화에 대한 자세한 분석을 TEM, 4-probe point 등의 다양한 분석 도구를 이용하여 진행하였다. Ytterbium과 molybdenum을 co-deposition하기 위하여 기판으로 $1{\sim}0{\Omega}{\cdot}cm$의 비저항을 갖는 low doped n-type Si (100) bulk wafer를 사용하였다. Native oxide layer를 제거하기 위해 1%의 hydrofluoric (HF) acid solution에 wafer를 세정하였다. 그리고 고진공에서 RF sputtering 법을 이용하여 Ytterbium과 molybdenum을 동시에 증착하였다. RE metal의 경우 oxygen과 높은 반응성을 가지므로 oxidation을 막기 위해 그 위에 capping layer로 100 nm 두께의 TiN을 증착하였다. 증착 후, 진공 분위기에서 rapid thermal anneal(RTA)을 이용하여 $300{\sim}700^{\circ}C$에서 각각 1분간 열처리하여 ytterbium silicides를 형성하였다. 전기적 특성 평가를 위한 sheet resistance 측정은 4-point probe를 사용하였고, Mo doped ytterbium silicide와 Si interface의 atomic scale의 미세 구조를 통한 Mo doped ytterbium silicide의 형성 mechanism 분석을 위하여 trasmission electron microscopy (JEM-2100F)를 이용하였다.

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A Fully-integrated Ku/K Broadband Amplifier MMIC Employing a Novel Chip Size Package (새로운 형태의 CSP를 이용한 완전 집적화 Ku/K밴드 광대역 증폭기 MMIC)

  • Yun, Young
    • Journal of Navigation and Port Research
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    • v.27 no.2
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    • pp.217-221
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    • 2003
  • In this work, we used a novel RF-CSP to develop a broadband amplifier MMIC, including all the matching and biasing components, for Ku and K band applications. By utilizing an ACF for the RF-CSP, the fabrication process for the packaged amplifier MMIC could be simplified and made cost effective. STO (SrTiO$_3$) capacitors were employed to integrate the DC biasing components on the MMIC. A pre-matching technique was used for the gate input and drain output of the FETs to achieve a broadband design for the amplifier MMIC. The amplifier CSP MMIC exhibited good RF performance (Gain of 12.5$\pm$1.5 dB, return loss less than -6 dB, PldB of 18.5$\pm$1.5 dBm) over a wide frequency range. This work is the first report of a fully integrated CSP amplifier MMIC successfully operating in the Ku/K band.