• 전기전자학회논문지
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• 제2권2호
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• pp.309-315
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• 1998

본 논문에서는 광대역 종합 통신망 응용을 위한 8b 52 MHz CMOS 서브레인징 (subranging) A/D 변환기 (analog-to-digital converter : ADC)를 제안한다. 제안된 A/D 변환기는 새로운 방식의 동작 순서 기법을 사용하여 기존의 이중 채널 서브레인징 A/D 변환기 동작에 존재하는 홀딩 시간 (holding time)을 제거함으로써 신호 처리 속도 (throughput rate)를 50 % 향상시켰다. 또한, 하위 비트 A/D 변환기에서의 잔류 전압처리에 인터폴레이션 (interpolation) 기법을 이용하여 A/D 변환기의 비교기에 사용되는 프리앰프의 수를 50 % 수준으로 줄임으로써 면적을 감소시켰다. 시제품 A/D 변환기는 0.8 um n-well double-poly double-metal CMOS 공정으로 제작되었고, 측정 결과, 5 V 전원 전압과 52 MHz 샘플링 주파수에서는 230 mW, 3 V 전원 전압 및 40 MHz 샘플링 주파수에서는 60 mW의 전력을 각각 소모한다.

• 전자공학회논문지B
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• 제33B권2호
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• pp.217-226
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• 1996

Switched reluctance motor (SRM) drives appear today as viable alternatives to induction and brushless motor drives in a wide range of application such as machine tools, fans, and pumps. This paper deals with a new converter topology which can be used in order converter. The split source type converter consists of minimum switching devices to be used in switched reluctance motor (SRM) drive. In this proposed converter two switches and six diodes are added to split source type converter. The proposed converter has performance minimizes the negative torque, Which puts the phase current off by double impressed voltages. The major advangtage of this converter is the increase of the average output power while improving better converter efficiency in heavy load and high speed than other topologies. The proposed converter system has been implemented using 80C196KB microcontroller and experiments were carried out ot verify the simulation results.

• 대한전자공학회논문지SD
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• 제38권5호
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• pp.367-373
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• 2001

8개의 N과 P채널 EEPROM을 이용하여 A/D 변환기를 설계하였다. 프로그래밍 모드에서 EEPROM의 선형적 저장능력을 관찰하기 위해 MOSIS의 1.2㎛ double-poly CMOS 공정을 이용하여 셀이 제작되었다. 그 결과 1.25V와 2V구간에서 10㎷ 미만의 오차 내에서 셀이 선형적으로 프로그램 되는 것을 보았다. 이러한 실험 결과를 이용하여 프로그램 가능한 A/D 변환기의 동작이 Hspice에서 시뮤레이션 되었으며, 그 결과 A/D 변환기가 37㎼의 전력을 소모하고 동작주파수는 333㎒ 정도인 것으로 관찰되었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 하계학술대회 논문집 A
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• pp.459-461
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• 1994

This paper proposed a new converter topology improving the split source type converter. In this converter. two switches and six diodes add to the split source type converter. The proposed converter has a performance minimized a negative torqe, putting a phase current off by double impressed voltage 2Vdc. Hence, a new converter results in increase of the average output power and improves converter efficiency in heavy load and high speed. Theoretical prediction is verified by experimental results got with a new proposed converter and 8/6 poles SRM.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.193-197
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• 2001

This paper presents a novel circuit topology of the double two-switch forward type high frequency transformer linked soft-switching PWM DC-DC power converter with tapped inductor filters that can operate under a condition of the low peak voltage stress across the power semiconductor devices and lowered peak current stress through the transformer for some high power applications. This circuit topology of an interleaved two-switch forward soft-switching power converter is proposed in the order to minimize an idle circulating current due to the tapped inductor filter without of any additional active auxiliary resonant-assisted snubber circuits, such as active resonant DC link snubbers and AC link snubbers, active resonant commutation leg link snubbers. The unique advantages of this power converter are less power circuit components and power semiconductor devices, constant frequency PWM scheme, cost effective configuration and wider soft-switching PWM operation range under PWM power regulations load variations. The practical effectiveness of the proposed soft-switching converter circuit topology is tested by simulations and is proved by experimental results received from the 500W-100kHz breadboard setup.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2013년도 추계학술대회 논문집
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• pp.13-14
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• 2013

Multiple output converters (MOCs) are widely used for applications which require various kinds of the output voltages due to its advantages in cost, volume, and efficiency. However, most of the MOCs developed so far can regulate only one output tightly and require as many secondary windings in the transformer as the number of the outputs. In this paper, a novel Time Division Multiple Control (TDMC) method to regulate all the outputs in high precision is proposed and applied to the double ended forward converter for the multiple battery charger. Additional benefit of the proposed topology is to require only one secondary winding in the transformer for all the outputs. The proposed converter can charge two different kinds of batteries or same kind of batteries in different state of charges (SOCs) by CC/CV mode independently with the even degree of tight regulation, thereby satisfying the ripple requirements for each battery.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 A
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• pp.136-139
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• 1997

The active-clamped double forward-flyback converter is studied in this paper. The converter reduces the voltage stress of the switches and decreases switching loss, EMI. The energy stored in the magnetic core is transferred to both the input voltage source and the flyback output. This makes it possible the output circuit of the flyback to operate at CCM without complex control circuit. The MOSFET is used at output stage, which decreases switching loss.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권2호
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• pp.246-251
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• 2014

In this paper, a high-speed CMOS Image Sensor (CIS) based on a 10-bit two step Single Slope A/D Converter (SS-ADC) is proposed. The A/D converter is composed of both 5-bit coarse ADC and a 6-bit fine ADC, and the conversion speed is 10 times faster than that of the single-slope A/D convertor. In order to reduce the pixel noise, further, a Hybrid Correlated Double Sampling (H-CDS) is also discussed. The proposed A/D converter has been fabricated with 0.13um 1-poly 4-metal CIS process, and it has a QVGA ($320{\times}240$) resolution. The fabricated chip size is $5mm{\times}3mm$, and the power consumption is about 35 mW at 3.3 V supply voltage. The measured conversion speed is 10 us, and the frame rate is 220 frames/s.

• International Journal of Fluid Machinery and Systems
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• 제9권3호
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• pp.222-228
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• 2016

Almost 70% of the earth is covered by the ocean. Extracting the power available in the ocean using a wave energy converter has been seen to be eco-friendly and renewable. This study focuses on developing a method for analyzing a wave energy device that uses a cross-flow turbine. The motion of the ocean wave causes an internal bi-directional flow of water and the cross-flow turbine is able to rotate in one direction. This device is considered of double-hull structure, and because of this structure, sea water does not come into contact with theturbine. Due to this, the problem of befouling on the turbine is avoided. This study shows specific relationship for wave length and several motions.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.277-279
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• 2008

In this paper, a novel active boost converter for SR drive is proposed. An active capacitor circuit is added in the front-end. Based on this active capacitor network, when boost switch turns off, this network seems as passive capacitor network. And the voltage of boost capacitor can keep balance with dc-link voltage automatically. In the capacitor network, discharging voltage is general dc-link voltage in parallel-connected capacitors; charging voltage is double dc-link voltage in series-connected capacitors. When boost switch turns on, two capacitors are connected in series, and discharging voltage is up to double dc-link voltage. So the fast excitation current can be obtained from this mode. Profit from fast excitation and fast demagnetization mode, the performance and output power can be improved. Some computer simulations are done to verify the performance of proposed converter.