• Title/Summary/Keyword: Double converter

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Design of Active Regenerative Bidirectional DC-DC Converter Using Electric Railway Simulator (철도차량 시뮬레이터를 이용한 능동회생 양방향 DC-DC 컨버터 설계)

  • Park, Chan-Heung;Kim, Jong-Yoon;Cho, Ki-Hyun;Jang, Su-Jin;Lee, Byoung-Kuk;Won, Chung-Yuen
    • Proceedings of the KIPE Conference
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    • 2007.11a
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    • pp.166-168
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    • 2007
  • 본 논문에서는 직류 지하철 급전시스템에서 발생하는 회생전력을 활용하기 위한 회생전력 제어용 양방향 DC-DC 컨버터 및 EDLC(Electric Double Layer Capacitor)를 이용한 양방향 DC-DC 컨버터의 효율적 충 방전 제어 알고리즘을 제안하였다. 가선전압의 변화에 따른 제어 방법을 제안함으로서 회생전력의 발생으로 인한 가선전압의 상승을 안정적으로 제어할 수 있도록 하였고, 실측된 가선전압과 동일한 직류 급전시스템의 모의가 가능한 가선전압 모의장치를 사용하여 철도차량용 양방향 DC-DC 컨버터의 효율성을 검증하였다.

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Isolated DC/DC Converter Using Full-Bridge Topology (Full-bridge 방식의 절연형 DC/DC 컨버터)

  • Heo, Min-Ho;Park, Sung-Jun;Kim, Kwang-Heon;Song, Sung-Geun;Kim, Jong-Kweon
    • Proceedings of the KIEE Conference
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    • 2009.07a
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    • pp.987_988
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    • 2009
  • 견인용 시스템에 있어서 구동모터의 효율증대를 위해서는 고압전원이 필수적이며 이를 위해 일반적으로 승압 DC/DC 컨버터 사용하고 있으나, Hard Switching 방식의 PWM 컨버터로는 효율향상에 한계가 있으며 동특성이 저하되는 단점이 있다. 본 논문에서는 새로운 방식의 절연된 차량용 고압 DC/DC 컨버터를 이용하여 효율 및 동특성을 개선하기위해 Full-bridge 컨버터와 Double-half-bridge 컨버터를 이용한 소프트 스위칭방식으로 고효율화를 달성하고 컨버터의 동특성을 향상시켰다.

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Control Strategy of MMC-HVDC under Unbalanced Grid Voltage Conditions

  • Zhang, Jianpo;Zhao, Chengyong
    • Journal of Power Electronics
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    • v.15 no.6
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    • pp.1499-1507
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    • 2015
  • High voltage direct current transmission based on modular multilevel converter (MMC-HVDC) is one of the most promising power transmission technologies. In this study, the mathematical characteristics of MMC-HVDC are analyzed in a synchronous rotational reference frame. A hybrid current vector controller based on proportional integer plus resonant is used to uniformly control the DC and double-base frequency AC currents under unbalanced grid voltage conditions. A corresponding voltage dependent current order limiter is then designed to solve the overcurrent problems that may occur. Moreover, the circulating current sequence components are thoroughly examined and controlled using a developed circulating current suppressor. Simulation results verify the correctness and effectiveness of the proposed control schemes.

Multi-Level Operation with Two-Level Converters through a Double-Delta Source Connected Transformer

  • Park, Yongsoon;Ohn, Sungjae;Sul, Seung-Ki
    • Journal of Power Electronics
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    • v.14 no.6
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    • pp.1093-1099
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    • 2014
  • This paper proposes a power conversion topology involving a multi-winding transformer and converters. The fundamental idea is described with circuit diagrams, and the voltage output of the proposed topology is analyzed mathematically. The effectiveness of the topology is discussed with test results from a small-scale power conversion system. When conventional hardware consisting of two-level converters and a transformer is employed, multi-level voltage outputs can be applied to the transformer windings by the proposed method.

A Study on Electrical-Inertia System For Traction System (추진장치 시험을 위한 전기적 관성 부하 구현에 관한 연구)

  • Kim, Gil-Dong;Han, Young-Jae;Park, Hyun-Jun;Jho, Jeong-Min;Jang, Dong-Uook;Han, Kyung-Hee
    • Proceedings of the KIEE Conference
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    • 2001.07b
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    • pp.1079-1081
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    • 2001
  • A propulsion system apparatus is needed for a railroad vehicle to test and estimate propulsion performance. The electrical inertia simulator to facilitate the development and testing of propulsion systems, is presented in this paper. It is based on a vector-controlled induction motor drive supplied from the AC mains through a double PWM converter that provides desirable features such as bi-directional power flow, nearly unity power factor and low harmonic factor at the AC mains. A theoretical analysis is first presented, followed by a detailed simulation study to assess the overall system performance under dynamic conditions.

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A Design of CMOS ADC for Video Interface (비디오 신호 인터페이스를 위한 CMOS ADC의 설계)

  • 안승헌;권오준;임진업;최중호
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.975-978
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    • 2003
  • 본 논문에서는 비디오 신호 인터페이스를 위해 10비트 50MHz ADC 를 설계하였으며 DCL(digital-error correction logic)을 갖는 3-3-3-4 구조의 파이프라인 방식을 사용하였다. SHA(sample and hold amplifier)와 MDAC (multiplying digital-to-analog converter)에 쓰이는 증폭기는 높은 이득을 갖도록 gain-boosting 기법을 적용하였으며, 전력소모와 면적을 줄이기 위해 capacitor scaling 기법을 적용하였다. 본 ADC 는 0.35 μm double-poly four-metal n-well CMOS 공정으로 설계 및 제작하였으며, 전체 회로는 3.3V 단일 전원 전압에서 동작하도록 설계하였다. 측정 결과 5MHz 의 입력을 인가하였을 때 SNDR 은 56.7dB, 전체 전력 소모는 112mW 이며, 입출력 단의 패드를 포함한 전체 칩 면적은 2.6mm×2.6mm이다.

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A Memory Intensive Real-time 3x3 Neighborhood processor for Image Processing (Memory Intensive 실시간 영상신호처리용 3 $\times$ 3 Neighborhood VLSI 처리기)

  • 김진홍;남철우;우성일;김용태
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.6
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    • pp.963-971
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    • 1990
  • This paper proposes a memory intensive VLSI architecture for the realization of real-time 3x3 neighborhood processor based on the distributed arithmetic. The proposed architecture is characterized by a bit serial and multi-kernel parallel processing which exploits the pixel kernel parallelism and concurrency. The chip implements 8 neighborhood processing elements in parallel with efficirnt input and output modules which operate concurrently. Besides the a4chitectural design of a neighborhood processor, the design methodology using module generator concept has been considered and MOGOT(MOdule Generator Oriented VLSI design Tool) has been constructed based on the workstation. Based on these design environments MOGOT, it has been shown that the main part of the suggested architecture can be designed efficiently using 2\ulcorner double metal CMOS technology. It includes design of input delay and data conversion module, look-up table for inner product operation, carry save accumulator, output data converter and delay module, and control module.

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The Design and Implementation of a TV Tuner for the Digital Terrestrial Broadcasting

  • Chong, Young-Jun;Kim, Jae-Young;Lee, Il-Kyoo;Choi, Jae-Ick;Oh, Seung-Hyeub
    • Journal of electromagnetic engineering and science
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    • v.1 no.2
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    • pp.131-138
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    • 2001
  • The DTV (Digital TV) tuner for an 8-VSB (Vestigial Side-Band) modulation was developed to meet the requirements of the ATSC (Advanced Television Systems Committee). The double frequency conversion and the active tracking filter in the front-end were used to cancel interferences between adjacent channels and multi-channels by suppressing the IF beat and the Image frequency. However, It was impossible to get frequency mapping between the tracking filter and the first VCO (Voltage Controlled Oscillator) in the existing DTV tuner structure which differs from the NTSC (National Television Systems Committee) tuner. This paper, therefore, suggests an assailable structure and a new method for the automatic frequency selection by mapping the frequency characteristics over the tracking voltage and the combined HW which is composed of a Micro-controller, an EEPROM (Electrically Erasable Programmable Read Only Memory), a DAC (Digital-to-Analog Converter), an OP amplifier, and a switch driver.

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A Control Design of Energy Storage System for Electric Railway Vehicle Using Supercapacitor (슈퍼커패시터를 이용한 전동차량용 에너지저장시스템의 제어기 설계)

  • Noh, Se-Jin;Lee, Jin-Mok;Son, Kyoung-Min;Choi, Eun-Jin;Choi, Jae-Ho
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.994-995
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    • 2008
  • It is possible to suppress voltage drops, power loading fluctuations and regeneration power lapses for DC railway systems by applying an energy storage system. A electric double layer capacitor (EDLC) of the rapid charge/discharge type has been developed and used in wide ranges. It has a long life, high efficiency and maintenance free/low pollution features as a new energy storage element. In this paper, an efficient charge and discharge control method of a bidirectional DC-DC converter using the supercapacitor is proposed.

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Capacitance Estimation of the Submodule Capacitors in Modular Multilevel Converters for HVDC Applications

  • Jo, Yun-Jae;Nguyen, Thanh Hai;Lee, Dong-Choon
    • Journal of Power Electronics
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    • v.16 no.5
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    • pp.1752-1762
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    • 2016
  • To achieve higher reliability in the modular multilevel converters (MMC) for HVDC transmission systems, the internal condition of the DC capacitors of the submodules (SM) needs to be monitored regularly. For an online estimation of the SM capacitance, a controlled AC current with double the fundamental frequency is injected into the circulating current loop of the MMC, which results in current and voltage ripples in the SM capacitors. The capacitor currents are calculated from the arm currents and their switching states. By processing these AC voltage and current components with digital filters, their capacitances are estimated by a recursive least square (RLS) algorithm. The validity of the proposed scheme has been verified by simulation results for a 300-MW, 300-kV HVDC system. In addition, its feasibility has been verified by experimental results obtained with a reduced-scale prototype. It has been shown that the estimation errors for both the simulation and experimental tests are 1.32% at maximum.