• Title/Summary/Keyword: Double Fourier

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Analysis of Trans Fat in Edible Oils with Cooking Process

  • Song, Juhee;Park, Joohyeok;Jung, Jinyeong;Lee, Chankyu;Gim, Seo Yeoung;Ka, HyeJung;Yi, BoRa;Kim, Mi-Ja;Kim, Cho-il;Lee, JaeHwan
    • Toxicological Research
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    • v.31 no.3
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    • pp.307-312
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    • 2015
  • Trans fat is a unsaturated fatty acid with trans configuration and separated double bonds. Analytical methods have been introduced to analyze trans fat content in foods including infrared (IR) spectroscopy, gas chromatography (GC), Fourier transform-infrared (FT-IR) spectroscopy, reverses-phase silver ion high performance liquid chromatography, and silver nitrate thin layer chromatography. Currently, FT-IR spectroscopy and GC are mostly used methods. Trans fat content in 6 vegetable oils were analyzed and processing effects including baking, stir-frying, pan-frying, and frying on the formation of trans fat in corn oil was evaluated by GC. Among tested vegetable oils, corn oil has 0.25 g trans fat/100 g, whereas other oils including rapeseed, soybean, olive, perilla, and sesame oils did not have detectable amount of trans fat content. Among cooking methods, stir-frying increased trans fat in corn oil whereas baking, pan-frying, and frying procedures did not make changes in trans fat content compared to untreated corn oils. However, the trans fat content was so low and food label can be declared as '0' trans based on the regulation of Ministry of Food ad Drug Safety (MFDS) (< 2 g/100 g edible oil).

PERIOD ANALYSIS FOR THE F COMPONENT OF THE ∈ AURIGAE SYSTEM USING WAVELETS (웨이블렛을 이용한 ∈ AURIGAE SYSTEM 주성 F별의 주기분석)

  • Kim, Hyouk
    • Journal of Astronomy and Space Sciences
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    • v.25 no.1
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    • pp.1-18
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    • 2008
  • We present a detailed period analysis for the F-type primary of ${\in}$ Aurigae by means of Fourier and wavelet algorithm. After collecting all available data which have been observed for around 160 years (1842 - 2006) from various international databases and published references we selected only data obtained during outside eclipse among them again. As a result of analysis using CLEANest and WWZ(weighted wavelet Z-transform) several frequencies including two clear periods ($67^d\;and\;123^d$) were found. In contrast to previous results that the periods vary irregularly it seems that the primary of ${\in}$ Aurigae is double mode or multiperiodic pulsator. The presence of the two periods and their ratio indicates that the high-mass interpretation of the variable could be valid. Also better understanding of the mechanisms driving the light variability of F-type supergiant stars requires continual series of photometric and radial velocity measurements in outside eclipse of this star.

Development of Cobalt Sulfide-graphene Composite for Supercapacitor Applications

  • Jana, Milan;Samanta, Pranab;Murmu, Naresh Chandra;Kim, Nam Hoon;Kuila, Tapas;Lee, Joong Hee
    • Composites Research
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    • v.29 no.4
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    • pp.167-172
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    • 2016
  • $Co_9S_8/reduced$ graphene (CSRG) has been prepared by a facile two step hydrothermal method and used as a supercapacitor electrode material. It is anticipated that the $Co_9S_8$ and reduced graphene oxide (RGO) would serve as a spacer material to each other to stop the agglomeration and simultaneous contribution of electrical double layer capacitance (RGO) and pseudocapacitance ($Co_9S_8$) would provide high electrochemical properties. The chemical analysis has been done by Fourier transform infrared spectroscopy and the morphology is characterised by field emission scanning electron microscopy. CSRG shows a high electrical conductivity of $98S\;m^{-1}$. The symmetric supercapacitor shows a specific capacitance of ${\sim}728F\;g^{-1}$ with a current density of $2A\;g^{-1}$. CSRG also showed an energy density of $25.2Wh\;kg^{-1}$ with a power density of $1000W\;kg^{-1}$.

Design and Fabrication of a Processing Element for 2-D Systolic FFT Array (고속 퓨리어변환용 2차원 시스토릭 어레이를 위한 처리요소의 설계 및 제작)

  • Lee, Moon-Key;Shin, Kyung-Wook;Choi, Byeong-Yoon;,
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.3
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    • pp.108-115
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    • 1990
  • This paper describes the design and fabrication of a processing element that will be used as a component in the construction of a two dimensional systolic for FFT. The chip performs data shuffling and radix-2 decimation-in-time (DIT) butterfly arithmetic. It consists of a data routing unit, internal control logic and HBA unit which computes butterfly arithmetic. The 6.5K transistors processing element designed with standard cells has been fabricated with a 2u'm double metal CMOS process, and evaluated by wafer probing measurements. The measured characteristics show that a HBA can be computed in 0.5 usec with a 20MHz clok, and it is estimated that the FFT of length 1024 can be transformed in 11.2 usec.

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Higher-order Shear Deformable Analysis of Laminated Plates on Two-parameter Elastic Foundations (Two-parameter 탄성지반위에 놓인 고차전단변형 적층판의 해석)

  • Han, Sung-Cheon;Jang, Suk-Yoon
    • Journal of Korean Society of Steel Construction
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    • v.13 no.1
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    • pp.101-113
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    • 2001
  • The main purpose of this paper is to present deflections of laminated composite plates on the two-parameter foundations. that is an elastic foundation with shear layer. This paper focuses on the deformation behaviour of anisotropic structures on elastic foundations. The third-order shear deformation theory is applied by using the double-fourier series. To validate the derived equations the obtained displacements for simply supported isotropic and orthotropic plates on elastic foundations are compared with those of Timoshenko and LUSAS program. The results show an excellent agreement for the isotropic and LUSAS program. The results show an excellent agreement for the isotropic and orthotropic plates on the elastic foundations. Numerical results for displacements are presented to show the effects of side-to-thickness ratio aspect ratio, material anisotropy and shear modulus of foundations.

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Grafting of MMA onto MCC through free radical method and its application to all natural cellulose composite film preparation (Microcrystalline cellulose에 자유 라디칼을 이용한 methyl methacrylate의 그래프팅 반응과 이를 이용한 천연복합필름의 제조)

  • Lee, Soo;Park, Sang-Hee;Jin, Seok-Hwan;Lee, Sun-Young
    • Journal of the Korean Applied Science and Technology
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    • v.25 no.4
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    • pp.459-468
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    • 2008
  • Methyl methacrylate(MMA) was grafted onto microcrystalline cellulose(MCC) with ceric ammonium nitrate(CAN) as a redox initiator at the various conditions. The cellulose triacetate(CTA) composite films added MCC and MMA-grafted MCC powders were prepared on a glass plate. The graft yield(GY) and graft efficiency(GE) of the grafted MCC were calculated with the simple equations by the weight balance method. The double bond of C=O on the grafted MCC surfaces was confirmed by the fourier transform infrared spectroscopy with attenuated total reflection(FT-IT ATR) spectrophotometer. After grafting, the degree of crystallinity of cellulose powders was decresed by judging from x-ray diffraction(XRD) data. Scanning electron microscope(SEM) photos showed the only solvent and CAN solution could change the roughness of MCC powders and the effect of powder dispersions in composite matrix. The tensile strength of MCC/CTA composite films was decreased with increase of MCC powder contents. When 5% grafted MCC was added, the tensile strength of grafted MCC/CTA composite films was increased from 82.3 MPa to 97.2 MPa. The thermal property of powders was also analyzed by the thermogravimetric analysis(TGA).

Experimental Study on the Sediment Sorting Processes of the Bed Surface by Geomorphic Changes in the Alluvial Channels with Mixed Grain Size (실내실험에 의한 혼합사로 구성된 하상 표층에서 지형변동에 따른 유사의 분급 특성 분석)

  • Jang, Chang-Lae
    • Journal of Korea Water Resources Association
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    • v.47 no.12
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    • pp.1213-1225
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    • 2014
  • The development of bars and sediment sorting processes in the braided channels with the mixed grain sizes are investigated experimentally in this study. The sediment in the steep slope channels discharges with highly fluctuation. However, it discharges with relatively periodic cycles in the mild slope channels. The characteristics and amplitudes of the dominant bars are examined by double fourier analysis. The dimensionless sediment particle size decreases as the longitudinal bed elevation increases. However, the size increases as the longitudinal bed elevation decreases. As the dimensionless critical tractive force in the surface layer ratio to the force in the subsurface layer increases, the surface geometric mean size of sediments and the dimensionless sediment particle size decrease. This means that coarse matrix is formed with the dimensionless tractive force by the sediment selective sorting.

Implementation of Stable Optical Information Security System using Interference-based Computer Generated Hologram iud $BaTiO_3$ (간섭을 기반으로한 컴퓨터형성홀로그램과 $BaTiO_3$를 이용한 안정한 광 정보보호 시스템의 구현)

  • 김철수;김종윤;박영호;김수중;조창섭
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.8C
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    • pp.827-834
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    • 2003
  • In this paper, we implemented an optical information security system using computer generated hologram based on the principle of interference and BaTiO$_3$that is photorefractive material. First of all, we would generate binary phase hologram which can reconstruct the original image perfectly, and regard this hologram as the image to be encrypted. And then applying the interference rule to the hologram, encrypted and reference (fkey information) images are generated. In the decrypting process, we can get an interference intensity by interfering the reference image and the encrypted image in the Mach-Zehnder interferometer. and transforming interference intensity information into phase information using LCD(liquid crystal display) and finally recover original image by inverse Fourier transforming the phase information. In this process, the Intensity information generated by interference of two images is very sensitive to external vibrations. So, we get a stable interference using the characteristic of SPPCM(self pumped phase conjugate mirror) of BaTiO$_3$that is photorefractive material. The proposed method has an advantage of double image encryption by encrypting the hologram of the image instead of original image.

A VLSI Architecture of Systolic Array for FET Computation (고속 퓨리어 변환 연산용 VLSI 시스토릭 어레이 아키텍춰)

  • 신경욱;최병윤;이문기
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.9
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    • pp.1115-1124
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    • 1988
  • A two-dimensional systolic array for fast Fourier transform, which has a regular and recursive VLSI architecture is presented. The array is constructed with identical processing elements (PE) in mesh type, and due to its modularity, it can be expanded to an arbitrary size. A processing element consists of two data routing units, a butterfly arithmetic unit and a simple control unit. The array computes FFT through three procedures` I/O pipelining, data shuffling and butterfly arithmetic. By utilizing parallelism, pipelining and local communication geometry during data movement, the two-dimensional systolic array eliminates global and irregular commutation problems, which have been a limiting factor in VLSI implementation of FFT processor. The systolic array executes a half butterfly arithmetic based on a distributed arithmetic that can carry out multiplication with only adders. Also, the systolic array provides 100% PE activity, i.e., none of the PEs are idle at any time. A chip for half butterfly arithmetic, which consists of two BLC adders and registers, has been fabricated using a 3-um single metal P-well CMOS technology. With the half butterfly arithmetic execution time of about 500 ns which has been obtained b critical path delay simulation, totla FFT execution time for 1024 points is estimated about 16.6 us at clock frequency of 20MHz. A one-PE chip expnsible to anly size of array is being fabricated using a 2-um, double metal, P-well CMOS process. The chip was layouted using standard cell library and macrocell of BLC adder with the aid of auto-routing software. It consists of around 6000 transistors and 68 I/O pads on 3.4x2.8mm\ulcornerarea. A built-i self-testing circuit, BILBO (Built-In Logic Block Observation), was employed at the expense of 3% hardware overhead.

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Design of Radix-4 FFT Processor Using Twice Perfect Shuffle (이중 완전 Shuffle을 이용한 Radix-4 FFT 프로세서의 설계)

  • Hwang, Myoung-Ha;Hwang, Ho-Jung
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.2
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    • pp.144-150
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    • 1990
  • This paper describes radix-4 Fast Fourier Transform (FFT) Processor designed with the new twice perfect shuffle developed from a perfect shuffle used in radix-2 FFT algorithm. The FFT Processor consists of a butterfly arithmetic circuit, address generators for input, output and coefficient, input and output registers and controller. Also, it requires the external ROM for storage of coefficient and RAM for input and output. The butterfly circuit includes 12 bit-serial ($16{\times}8$) multipliers, adders, subtractors and delay shift registers. Operating on 25 MHz two phase clock, this processor can compute 256 point FFT in 6168 clocks, i.e. 247 us and provides flexibility by allowing the user to select any size among 4,16,64,and256points. Being fabricated with 2-um double metal CMOS process, it includes about 28000 transistors and 55 pads in $8.0{\times}8.2mm^2$area.

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