• Korean Journal of Environmental Biology
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• v.22 no.2
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• pp.295-299
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• 2004

The lacertid lizard Takydromus wolteri widely distributed in South Korea, but intraspecific diversity of this species was not almost studied. T. wolteri represented by 8 specimens collected from 5 localities were analyzed by the Randomly Amplified Polymorphic DNA (RAPD) method with 28 random decamer primers and the phenogram constructed by using the Unweighted Pair Group Method with Arithmetic Mean (UPGMA) method based on RAPD data. The populations of T. wolteri using in this paper were collected from Gyeonggi-do, Chungcheongbuk-do, Jeju-do, Jeollanam-do and Gyeongsangnam -do in South Korea. Among 68 different bands detected in RAPD analysis, 59 bands (87％) showed polymorphism. The phenogram showed that the populations of T. wolteri were grouped into two. These results suggest that T. wolteri were supported intraspecific diversity.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.10
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• pp.1433-1443
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• 1993

DCT(Discrete Cosine Transform) / IDCT(Inverse DCT) is widely used in various image compression and decompression systems as well as in DSP(Digital Signal Processing) applications. Since DCT/ IDCT is one of the most complicated part of the compression system, the performance of the system can be greatly enchanced by improving the speed of DCT/IDCT operation. In this thesis, we designed a DCT/IDCT core processor using module generator technique. By utilizing the partial sum and DA(Distributed Arithmetic) techniques, the DCT/ IDCT core processor is designed within small area. It is also designed to perform the IDCT(Inverse DCT) operation with little additional circuitry. The pipeline structure of the core processor enables the high performance, and the high accuracy of the DCT/IDCT operation is obtained by having fewer rounding stages. The proposed design is independent of design rules, and the number of the input bits and the accuracy of the internal calculation coa be easily adjusted due to the module generator technique. The accuracy of the processor satisfies the specifications in CCITT recommendation H, 261.

• School Mathematics
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• v.13 no.4
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• pp.675-696
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• 2011

This study was designed to understand PCK to improve professionalism of teachers and derive implications about proper teachings methods. For achieving these research purposes, different PCK and teaching methods in class of three teachers were compared and analyzed targeting arithmetic operation unit of fraction. For this study, criteria of PCK analysis of teachers was set, PCK questionnaires were produced and distributed, teachers had interviews, PCK of teachers were analyzed, two times fraction class was observed and analyzed, and PCK of teachers and their classes were compared. Followings are results to analyze PCK of teachers about fraction. In relation to PCK of three teachers, first of all, A teacher accurately understood concepts of fraction and learners' errors that may occur when they study fraction. Also, he(she) proposed concrete teaching strategies for fraction based on manipulated materials. B teacher also understood concepts of fraction and learners' errors accurately too. On the other hand, C teacher laid stress on knowledge to stress principles and taught that they are bases for every class. These results mean that self-training and inservice- training should be efficiently upgraded to improve PCK of teachers.

• Structural Engineering and Mechanics
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• v.4 no.5
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• pp.553-568
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• 1996

Finite element stiffness matrix methods are presented for finding natural frequencies (or buckling loads) and modes of repetitive structures. The usual approximate finite element formulations are included, but more relevantly they also permit the use of 'exact finite elements', which account for distributed mass exactly by solving appropriate differential equations. A transcendental eigenvalue problem results, for which all the natural frequencies are found with certainty. The calculations are performed for a single repeating portion of a rotationally or linearly (in one, two or three directions) repetitive structure. The emphasis is on rotational periodicity, for which principal advantages include: any repeating portions can be connected together, not just adjacent ones; nodes can lie on, and members along, the axis of rotational periodicity; complex arithmetic is used for brevity of presentation and speed of computation; two types of rotationally periodic substructures can be used in a multi-level manner; multi-level non-periodic substructuring is permitted within the repeating portions of parent rotationally periodic structures or substructures and; all the substructuring is exact, i.e., the same answers are obtained whether or not substructuring is used. Numerical results are given for a rotationally periodic structure by using exact finite elements and two levels of rotationally periodic substructures. The solution time is about 500 times faster than if none of the rotational periodicity had been used. The solution time would have been about ten times faster still if the software used had included all the substructuring features presented.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.7C
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• pp.658-665
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• 2005

Re-assignment scheme of index in index image is called reindexing. It has been well known that index image can be reindexed without losslessness. In this paper, we introduces an adaptive rank based reindexing scheme using co-occurrence frequency between neighboring pixels. Original index image can be converted into rank image by the proposed scheme. Using the proposed scheme, a better compression efficiency can be expected because most of the reindexed values(rank) get distributed with a smaller variance than the original index image. Experinental results show that the proposed scheme achieves a much better compression performance over GIF, arithmetic coding, Zeng's algorithm and RIAC scheme.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.1
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• pp.58-70
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• 1990

This paper describes a VLSI implementation of real-time two dimensional DCT processor for the subprimary rate video codec system. The proposed architecture exploits the parallelism and concurrency of the distributes architecture for vector inner product operation of DCT and meets the CCITT performance requirements of video codec for full CSIF 30 frames/sec. It is also shown that this architecture satisfies all the CCITT IDCT accuracy specification by simulating the suggested architecture in bit level. The efficient VLSI disign methodology to design suggested architecture is considered and the module generator oriented design environments are constructed based on SUN 3/150C workstation. Using the constructed design environments. the suggensted architecture have been designed by double metal 2micron CMOS technology. The chip area fo designed 8x8 2-D DA-DCT (Distributed Arithmetic DCT) processor is about 3.9mmx4.8mm.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.11
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• pp.29-36
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• 2003

In this paper, an efficient VLSI architecture for DCTQ module, which consists of 2D-DCT, quantization, AC/DC prediction block, scan conversion, inverse quantization and 2D-IDCT, is presented. The architecture of the module is designed to handle a macroblock data within 1064 cycles and suitable for MPEG-4 video codec handling 30 frame CIF image for both encoder and decoder simultaneously. Only single 1-D DCT/IDCT cores are used for the design instead of 2-D DCT/IDCT, respectively. 1-bit serial distributed arithmetic architecture is adopted for 1-D DCT/IDCT to reduce the hardware area in this architecture. To reduce the power consumption of DCTQ modu1e, we propose the method not to operate the DCTQ modu1e exploiting the SAE(sum of absolute error) value from motion estimation and cbp(coded block pattern). To reduce the AC/DC prediction memory size, the memory architecture and memory access method for AC/DC prediction block is proposed. As the result, the maximum utilization of hardware can be achieved, and power consumption can be minimized. The proposed design is operated on 27MHz clock. The experimental results show that the accuracy of DCT and IDCT meet the IEEE specification.

• Journal of Life Science
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• v.23 no.9
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• pp.1088-1095
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• 2013

The swimming crab, Portunus trituberculatus, inhabits seafloor habitats containing sand or pebbles and is widely distributed throughout the world. The present study investigated genetic polymorphisms of 10 microsatellites in 281 samples of P. trituberculatus collected from four locations along the coastal water of the Korean side of the Yellow Sea (Yeonggwang, Taean, Sorea, and Yeonpyeong-do Island). The number of alleles per locus ranged from 50 to 129, with a mean of 69.5. The observed and expected hetrozygosity varied from 0.111 to 1.000 and from 0.609 to 0.979, respectively. The inbreeding coefficients (Fis) varied among the loci from -0.0207 to 0.8175. The genetic differentiation (Fst) was less than 0.05 (range 0.0020-0.0124). Therefore, the four groups of P. trituberculatus appeared to exhibit little genetic differentiation. The lack of differentiation was confirmed in a phylogenetic tree constructed by the unweighted pair group method with the arithmetic average (UPGMA). The hypervariation between the populations and the lack of genetic differentiation may reflect active gene flow among the Yellow Sea populations and the absence of geographical boundaries. The highly polymorphic microsatellite loci will be useful for molecular and phylogenetic studies, as well as stock management, of swimming crab, which is an important fishery resource.

• Journal of the Korean Society of Fisheries and Ocean Technology
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• v.38 no.3
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• pp.249-255
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• 2002

This paper describes on the extraction of ship's real-time movement information using a combination full-function ARPA radar and ECS system that displays radar images and an electronic chart together on a single PC screen. The radar target extractor(RTX) board, developed by Marine Electronics Corporation of Korea, receives radar video, trigger, antenna bearing pulse and heading pulse signals from a radar unit and processes these signals to extract target information. The target data extracted from each pulse repetition interval in DSPs of RTX that installed in 16 bit ISA slot of a IBM PC compatible computer is formatted into a series of radar target messages. These messages are then transmitted to the host PC and displayed on a single screen. The position data of target in range and azimuth direction are stored and used for determining the center of the distributed target by arithmetic averaging after the detection of the target end. In this system, the electronic chart or radar screens can be displayed separately or simulaneously and in radar mode all information of radar targets can be recorded and replayed In spite of a PC based radar system, all essential information required for safe and efficient navigation of ship can be provided.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.4
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• pp.78-86
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• 1999

In this paper, a distributed arithmetic digital neural network with learning and testing phase implemented in a body has been studied. The proposed technique is based on the two facts; one is that the weighting coefficients adjusted will be stored in registers without shift, because input values or input patterns are not changed while learning and the other is that the input patterns stored in registers are not changed while testing. The proposed digital neural network is simulated by hardware description language such as VHDL and verified the performance that the neural network was applied to the recognition of seven-segment. To verify proposed neural networks, we compared the learning process of modified perceptron learning algorithm simulated by software with VHDL for 7-segment number recognizer. The results are as follows: There was a little difference in learning time and iteration numbers according to the input pattern, but generally the iteration numbers are 1000 to 10000 and the learning time is 4 to 200$\mu\textrm{s}$. So we knew that the operation of the neural network is learned in the same way with the learning of software simulation, and the proposed neural networks are properly operated. And also the implemented neural network can be built with less amounts of components compared with board system neural network.