• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.2
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• pp.95-103
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• 2011

This paper proposes a 6b 1.2 GS/s 47.8 mW 0.17 $mm^2$ 65 nm CMOS ADC for high-rate wireless personal area network systems. The proposed ADC employs a source follower-free flash architecture with a wide input range of 1.0 $V_{p-p}$ at a 1.2 V supply voltage to minimize power consumption and high comparator offset effects in a nanometer CMOS technology. The track-and-hold circuits without source followers, the differential difference amplifiers with active loads in pre-amps, and the output averaging layout scheme properly handle a wide-range input signal with low distortion. The interpolation scheme halves the required number of pre-amps while three-stage cascaded latches implement a skew-free GS/s operation. The two-step bubble correction logic removes a maximum of three consecutive bubble code errors. The prototype ADC in a 65 nm CMOS demonstrates a measured DNL and INL within 0.77 LSB and 0.98 LSB, respectively. The ADC shows a maximum SNDR of 33.2 dB and a maximum SFDR of 44.7 dB at 1.2 GS/s. The ADC with an active die area of 0.17 $mm^2$ consumes 47.8 mW at 1.2 V and 1.2 GS/s.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.8
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• pp.580-587
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• 2003

In this paper, we introduce a novel model to analyze the linearity of a TW-EAM (traveling-wave electroabsorption modulator). The device length, microwave loss (ML), and internal reflection (IR) due to impedance mismatch have effect on the linearity of a TW-EAM. The longer devices have characteristics of lower biases with minimum IMDS (intermodulation distortions). ML decreases the output power as well as the IMD value. Internal reflection has different nonlinear characteristics according to the wavelength of the input frequency and the device length. There is little change in SFDR (spurious-free dynamic range) due to ML or IR. As a result, for a 50 GHz band RF-optical communication system, a 0.8 mm-long TW-EAM with the lowest ML would have better properties by using n, which is caused by impedance, mismatch at the output port.

• Trans-
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• v.11
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• pp.1-35
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• 2021

This study looks to explore situations in which the authenticity of reality audition programs is inherently distorted by subjective intervention through a theoretical model of existentialism and case study of how it was practiced in an actual program. In detail, we examine the impact on the essence of human subjective intervention and the behavior by free will and use Sartre's existentialism a theoretical model and a Korean audition program series as the case for the study. We believe that the producers intended to narrow the audiences choices by creating a favorable environments for certain participants (trainees as they were called) to be recognized and liked by the voting audiences. We look to "subjectivity," the first principle of existentialism, people determine their essence through free will, and all actions in the production process are aimed at achieving that goal, which keeps the position balance of final debut group by creating the character image and personality through character making, storytelling and increasing or decrease the assigned air-time of each individuals.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.2
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• pp.17-27
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• 2011

This paper describes an experimental study and finite element analysis (FEA) carried out for investigating thermal deformation behavior of solders, resulting from temperature change in the solder. With such a goal in mind, a shear specimen that was composed of two metal bars having different coefficient of thermal expansion and solder blocks placed between two bars was designed and fabricated. Two different types of solder blocks, eutectic solder (Sn/36Pb/ 2Ag) and lead-free solder (Sn/3.0Ag/0.5Cu) were tested as well. Fringe patterns for several temperature steps were recorded and analyzed for three temperature cycles using a real-time moir$\acute{e}$ setup. The experimental data was verified with FEA and used to evaluate the suitability for numerous solder constitutive models available in literatures. FEA employing Anand material model suggested by Darveaux et al. and Chang et al. were found to be in an excellent agreement with the experimental results for the eutectic solder and the lead-free solder, respectively. In addition, numerical predictions on bending displacement, shear strain and viscoplastic distortion energy are documented and viscoplastic deformation behavior of two types of solder material are compared.

• The Plant Pathology Journal
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• v.31 no.3
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• pp.278-289
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• 2015

Indigenous strains of Trichoderma species isolated from rhizosphere soils of Tea gardens of Assam, north eastern state of India were assessed for in vitro antagonism against two important tea fungal pathogens namely Pestalotia theae and Fusarium solani. A potent antagonist against both tea pathogenic fungi, designated as SDRLIN1, was selected and identified as Trichoderma viride. The strain also showed substantial antifungal activity against five standard phytopathogenic fungi. Culture filtrate collected from stationary growth phase of the antagonist demonstrated a significantly higher degree of inhibitory activity against all the test fungi, demonstrating the presence of an optimal blend of extracellular antifungal metabolites. Moreover, quantitative enzyme assay of exponential and stationary culture filtrates revealed that the activity of cellulase, ${\beta}$-1,3-glucanase, pectinase, and amylase was highest in the exponential phase, whereas the activity of proteases and chitinase was noted highest in the stationary phase. Morphological changes such as hyphal swelling and distortion were also observed in the fungal pathogen grown on potato dextrose agar containing stationary phase culture filtrate. Moreover, the antifungal activity of the filtrate was significantly reduced but not entirely after heat or proteinase K treatment, demonstrating substantial role of certain unknown thermostable antifungal compound(s) in the inhibitory activity.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.189-193
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• 2015

This paper provides the design techniques of a successive approximation register (SAR) type 12b analog-to-digital converter (ADC) for distributed maximum power point tracking (DMPPT) control in a photovoltaic system. Both a top-plate sampling technique and a $V_{CM}$-based switching technique are applied to the 12b capacitor digital-to-analog converter (CDAC). With these techniques, we can implement a 12b SAR ADC with a 10b capacitor array digital-to-analog converter (DAC). To enhance the accuracy of the ADC, a single-to-differential converted DAC is exploited with the dual sampling technique during top-plate sampling. Simulation results show that the proposed ADC can achieve a signal-to-noise plus distortion ratio (SNDR) of 70.8dB, a spurious free dynamic range (SFDR) of 83.3dB and an effective number of bits (ENOB) of 11.5b with bipolar CMOS LDMOD (BCDMOS) $0.35{\mu}m$ technology. Total power consumption is 115uW under a supply voltage of 3.3V at a sampling frequency of 1.25MHz. And the figure of merit (FoM) is 32.68fJ/conversion-step.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.183-188
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• 2015

A 10-bit 10MS/s low power consumption successive approximation register (SAR) analog-to-digital converter (ADC) using a straightforward capacitive digital-to-analog converter (DAC) is presented in this paper. In the proposed capacitive DAC, switching is always straightforward, and its value is half of the peak-to-peak voltage in each step. Also the most significant bit (MSB) is decided without any switching power consumption. The application of the straightforward switching causes lower power consumption in the structure. The input is sampled at the bottom plate of the capacitor digital-to-analog converter (CDAC) as it provides better linearity and a higher effective number of bits. The comparator applies adaptive power control, which reduces the overall power consumption. The differential prototype SAR ADC was implemented with $0.18{\mu}m$ complementary metal-oxide semiconductor (CMOS) technology and achieves an effective number of bits (ENOB) of 9.49 at a sampling frequency of 10MS/s. The structure consumes 0.522mW from a 1.8V supply. Signal to noise-plus-distortion ratio (SNDR) and spurious free dynamic range (SFDR) are 59.5 dB and 67.1 dB and the figure of merit (FOM) is 95 fJ/conversion-step.

• Bulletin of the Society of Naval Architects of Korea
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• v.27 no.2
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• pp.21-30
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• 1990

Theoretical and experimental techniques to analyze the two-dimensional liquid motion in a tank are discussed. A Lagrangian FEM with a velocity correction procedure is introduced to describe incompressible free surface fluid flow. A mesh rezoning technique is used to prevent strong distortion of finite elements in the Lagrangian description. Model test technique for sloshing tank is developed using a hydraulic type bench tester. The influence of the variation in the exciting frequency and amplitude are observed for various fill depths. The results of theoretical calculations are compared with those of experiments.

• Journal of Power Electronics
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• v.16 no.4
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• pp.1578-1586
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• 2016

A power quality improvement scheme for grid connected inverters, even in the presence of the disturbances in grid voltages due to harmonic distortions and three-phase imbalance, is presented for distributed generation (DG) power systems. The control objective is to force the inverter currents to follow their references with robustness even under external disturbances in grid voltages. The proposed scheme is realized by a disturbance observer (DOB) based current control scheme. Since the uncertainty in a system can be effectively canceled out using an estimated disturbance by the DOB, the resultant system behaves like a closed-loop system consisting of a disturbance-free nominal model. For experimental verification, a 2 kVA laboratory prototype of a grid connected inverter has been built using a digital signal processor (DSP) TMS320F28335. Through comparative simulations and experimental results under grid disturbances such as harmonic distortion and imbalance, the effectiveness of the proposed DOB based current control scheme is demonstrated.

• Proceedings of the Korean Information Science Society Conference
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• 2011.06a
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• pp.73-76
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• 2011

본 논문에서는 기존 단일 인덱스 기반의 왜곡 제거 시계열 서브시퀀스 매칭의 인덱스 구성 알고리즘을 분석하여 보다 효율적인 인덱스 구성 알고리즘을 제안하였다. 기존 왜곡 제거 시계열 서브시퀀스 매칭의 단일 인덱스 구성 알고리즘은 대용량 시계열 데이터인 경우 왜곡 제거를 고려해야 되는 많은 윈도우로 인해 실제 인덱스 생성에 매우 많은 시간이 걸린다. 본 논문에서는 기존 선형 제거 서브시퀀스 매칭의 인덱스 구성 알고리즘을 예로서 인덱스를 구성하는 각 과정을 체계적으로 분석하여, 각 과정에서 필요한 연산 횟수를 줄이는 방법을 제안한다. 이를 위해, 저차원 변환하는 과정에서 발생하는 중복되는 연산들을 한 번씩 미리 수행하여 배열에 저장한 후 재사용하는 DF-버컷(DF-bucket)씨의 개념을 제시한다. 실험 결과, 저장 후 재사용 원칙에 따라 인덱스 구성의 효율성을 증대시킨 접근법이 그렇지 않은 접근법에 비해서 인덱스 구성 시간을 평균 32% 에서 55% 까지 줄인 것으로 나타났다.