• Journal of Electrical Engineering and Technology
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• v.7 no.2
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• pp.221-224
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• 2012

We propose a Readout Integrated Circuit (ROIC), which applies a fixed current bias sensing method to the input stage in order to simplify the circuit structure and the infrared sensor characteristic control. For the sample-and-hold stage to display and control a signal detected by the infrared sensor using a two-dimensional (2D) focal plane array, a differential delta sampling (DDS) circuit is proposed, which effectively removes the FPN. In addition, the output characteristic is improved to have wider bandwidth and higher gain by applying a two-stage variable gain amplifier (VGA). The output characteristic of the proposed device was 23.91 mV/$^{\circ}C$, and the linearity error rate was less than 0.22%. After checking the performance of the ROIC using HSPICE simulation, the chip was manufactured and measured using the SMIC 0.35 um standard CMOS process to confirm that the simulation results from the actual design are in good agreement with the measurement results.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.04a
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• pp.43-44
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• 2006

We have studied effect of Patterned Vertical Alignment (PVA) mode on electro-optical characteristics and stability of liquid crystal director upon electrode pattering. In the present studies, LC director field and stability of conventional PVA mode electrode patterns were analyzed and new type of electrode patterns were suggested. At last, comparison between this new type of electrode patterns to conventional electrode pattern types were followed.

• Journal of the Optical Society of Korea
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• v.4 no.1
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• pp.62-65
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• 2000

A new type of multi-viewing zone screen for multiview 3-D display is described. The screen is made by stacking a Fresnel lens and a reflective prism array plate. The screen performs both focusing and beam dividing functions and directs very narrow light beams to three viewing zones for three spectators. The results of experimental testing of the screen have demonstrated that current technology of Fresnel lens and prism grooves on PMMA(Ploymethyl Methacrylate) allows manufacture of screen having a pixel size of about 1-2 mm. This size is reasonable enough for a screen with dimensions about 1m size. Optical qualities of Fresnel lenses and grooved prism arrays achieve an angular resolution for the screen of several angular minutes.

• The KIPS Transactions:PartB
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• v.17B no.1
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• pp.31-36
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• 2010

After the launch of MPEG-2, it is widely used in multimedia applications like a Digital-TV or a DVD. Then, After the launch of H.264 at 2004, it has been expected to replace MPEG-2 and services IPTV and DMB. As we have been used to MPEG-2 devices by this time, we can not access H.264 Broadcast with MPEG-2 device. So We propose a new approach to transcode H.264 video into MPEG-2 form which can facilitate to display H.264 video with MPEG-2 device. To reduce the quality loss by transcoding, we use CPDT(Cascaded Pixel Domain Transcoder) structure. And to minimize processing time, SKIP block, INTRA block and motion vectors obtain from decoding process is employed for transcoding. we use BMA(Boundary Matching Algorithm) to select only one from candidate motion vectors. Experimental results show a considerable improved PSNR with reduction in processing time compared with existing methods.

• Journal of Sensor Science and Technology
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• v.23 no.5
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• pp.332-336
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• 2014

In this paper, we propose a complementary metal oxide semiconductor (CMOS) binary image sensor with a gate/body-tied (GBT) PMOSFET-type photodetector for high-speed operation. The GBT photodetector of an active pixel sensor (APS) consists of a floating gate ($n^+$-polysilicon) tied to the body (n-well) of the PMOSFET. The p-n junction photodiode that is used in a conventional APS has a good dynamic range but low photosensitivity. On the other hand, a high-gain GBT photodetector has a high level of photosensitivity but a narrow dynamic range. In addition, the pixel size of the GBT photodetector APS is less than that of the conventional photodiode APS because of its use of a PMOSFET-type photodetector, enabling increased image resolution. A CMOS binary image sensor can be designed with simple circuits, as a complex analog to digital converter (ADC) is not required for binary processing. Because of this feature, the binary image sensor has low power consumption and high speed, with the ability to switch back and forth between a binary mode and an analog mode. The proposed CMOS binary image sensor was simulated and designed using a standard CMOS $0.18{\mu}m$ process.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.9
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• pp.2023-2030
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• 2010

In this paper, we present research results of developing high performance scan conversion unit and implementing it on FPGA chip. To increase performance of scan conversion unit, we propose an architecture of scan converter that is a SIMD architecture and uses tile-based traversing method. The proposed scan conversion unit can operate about 124Mhz clock frequency on Xilinx Vertex4 LX100 device. To verify the scan conversion unit, we also develop shader unit, texture mapping unit and $240{\times}320$ color TFT-LCD controller to display outputs of the scan conversion unit on TFT-LCD. Because the scan conversion unit implemented on FPGA has 311Mpixels/sec pixel rate, it is applicable to desktop pc's 3d graphics system as well as mobile 3d graphics system needing high pixel rates.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.9
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• pp.1697-1702
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• 2017

This paper proposes a forward vehicle movement estimation algorithm for the image-based forward collision warning. The road region in the acquired image is designated as a region of interest (ROI) and a distance look up table (LUT) is made in advance. The distance LUT shows horizontal and vertical real distances from a reference pixel as a test vehicle position to any pixel as a position of a vehicle on the ROI. The proposed algorithm detects vehicles in the ROI, assigns labels to them, and saves their distance information using the distance LUT. And then the proposed algorithm estimates the vehicle movements such as approach distance, side-approaching and front-approaching velocities using distance changes between frames. In forward vehicle movement estimation test using road driving videos, the proposed algorithm makes the valid estimation of average 98.7%, 95.9%, 94.3% in the vehicle movements, respectively.

• Journal of Sensor Science and Technology
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• v.19 no.4
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• pp.328-335
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• 2010

We have designed and fabricated an active pixel sensor(APS) using an optimized n-well/gate-tied p-channel metal oxide semiconductor field effect transistor(PMOSFET)-type photodetector with a built-in transfer gate. This photodetector has a floating gate connected to n-well and a built-in transfer gate. The photodetector has been optimized by changing the length of the transfer gate. The APS has been fabricated using a 0.35 ${\mu}m$ standard complementary metal oxide semiconductor(CMOS) process. It was confirmed that the proposed APS has a wider dynamic range than the APS using the previously proposed photodetector and a higher sensitivity than the conventional APS using a p-n junction photodiode.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.1
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• pp.190-196
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• 2013

Curved integral imaging is a simple method to display 3D images in space using lens array and provides wide viewing angle. In this paper, we propose a nonlinear 3D correlator based on the direct pixel-mapping (DPM) method in order to improve the recognition performance of 3D target object in curving-effective integral imaging. With this scheme, the elemental image array (EIA) originally picked up from a partially occluded 3-D target object can be converted into a resolution enhanced new EIA by using DPM method. Then, through nonlinear cross-correlations between the reconstructed reference and the target plane images, the improved pattern recognition can be performed from the correlation outputs. To show the feasibility of the proposed method, some preliminary experiments are carried out and results are presented by comparing the conventional method.

• Journal of the Korea Convergence Society
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• v.11 no.12
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• pp.15-22
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• 2020

In this paper, we proposed a deep learning based super-resolution method that combines Channel Attention and Spatial Attention feature enhancement methods. It is important to restore high-frequency components, such as texture and features, that have large changes in surrounding pixels during super-resolution processing. We proposed a super-resolution method using feature enhancement that combines Channel Attention and Spatial Attention. The existing CNN (Convolutional Neural Network) based super-resolution method has difficulty in deep network learning and lacks emphasis on high frequency components, resulting in blurry contours and distortion. In order to solve the problem, we used an emphasis block that combines Channel Attention and Spatial Attention to which Skip Connection was applied, and a Residual Block. The emphasized feature map extracted by the method was extended through Sub-pixel Convolution to obtain the super resolution. As a result, about PSNR improved by 5%, SSIM improved by 3% compared with the conventional SRCNN, and by comparison with VDSR, about PSNR improved by 2% and SSIM improved by 1%.