• Title/Summary/Keyword: Display Methods

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Analysis of the Horizontal Block Mura Defect

  • Mi, Zhang;Jian, Guo;Chunping, Long
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1597-1599
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    • 2007
  • In TFT-LCD, mura is a defect which degrades the display quality. The resistance difference between gate lines is the main cause of H-Block mura. Two methods could eliminate this defect. A thinner gate layer or gate fan-out pattern decrease mura level. H-Block mura has been reduced after implementing the new schemes.

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Chromatic and Optical Characteristics of LCD TV

  • Pan, Po-Chuan;Koo, Horng-Show
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1795-1800
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    • 2006
  • HDTV will be the future TV system. LCD TV, accompanying with the progress of HDTV, rapidly grows up these years. Beside, several technologies and fabricating techniques have greatly enhanced resulting high quality display is easy to achieve. This paper will discuss video decoder, color filter, and backlight which is to know their functions, operating methods, and the chromatic and optical characteristics.

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Non-linear Interpolation for Color Images

  • Kim, Jong-Ho;Kim, Won-Ki;Yeom, Dong-Hyun;Jeong, Je-Chang
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1326-1329
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    • 2006
  • In this paper, we propose a non-linear interpolation of chrominance components based on the property of luminance signals to display color images effectively. The proposed method is more useful, in particular, for the images including stair-typed signal changes around edges. Experimental results show that the proposed method is superior to conventional methods in both objective and subjective performance.

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Address Electrode for PDP by Ink-Jet Method

  • Park, Lee-Soon;Im, Moo-Sik;Jung, Young-Chul
    • 한국정보디스플레이학회:학술대회논문집
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    • 2003.07a
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    • pp.775-777
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    • 2003
  • Several methods are available for the fabrication of electrode pattern for the plasma display panel(PDP) including screen printing and photolithographic method. Piezo type ink-jet printing method is considered to the method of choice for electrode patterning in manufacturing of PDP. Both silver ink and absorbent layer paste formulation were developed for ink-jet printing of electrode pattern. The ink-jet printing of silver electrode with preformed absorbent layer was especially suitable for the patterning of address electrode for high resolution PDP.

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Azo-Dyes Photo-Aligning; Physics and Applications

  • Chigrinov, V.G.;Kwok, H.S.;Takada, Hirokazu;Takatsu, Haruyoshi
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07a
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    • pp.759-763
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    • 2005
  • This review presents the status of our research in liquid crystal display (LCD) photo-aligning. We present the basic mechanisms of the photo-induced order in various photo-aligning materials and in azo-dye layers in particular and show that photo-aligning methods can provide a controllable pretilt angle and anchoring energy of the liquid crystal cell, as well as its high thermo and UV stability. The photo-aligning of various types of liquid crystal displays is also discussed.

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The Research on Vertical Block Mura in TFT-LCD

  • Long, Chunping;Wang, Wei;Wu, Hongjiang
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.841-844
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    • 2007
  • In this paper, a vertical block mura, which massively occurred in the LCD products, was investigated extensively by various methods, source drain (SD) line shift is found out to be one of the key reasons. This work to some extent, establishes theoretic hypothesis for further research and solutions similar issues.

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New Techniques for Fabrication of Flexible Plastic LCD's

  • West, John.L.;Novotny, Grea R.;Fisch, Michael R.;Heinman, David
    • Journal of Information Display
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    • v.2 no.4
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    • pp.15-18
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    • 2001
  • We report simple techniques to manufacture low-powered, high-resolution, reflective cholesteric displays using flexible plastic substrates. We use wax transfer printing to replace photo-lithography and incorporate polymer walls to increase the mechanical strength and lifetime of the displays. These printing methods can easily be adapted to roll-to-roll production.

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Studies on Flip Chip Underfill Process by using Molding System (몰딩공정을 응용한 플립칩 언더필 연구)

  • 한세진;정철화;차재원;서화일;김광선
    • Journal of the Semiconductor & Display Technology
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    • v.1 no.1
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    • pp.29-33
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    • 2002
  • In the flip-chip process, the problem like electric defect or fatigue crack caused by the difference of CTE, between chip and substrate board had occurred. Underfill of flip chip to overcome this defects is noticed as important work developing in whole reliability of chip by protecting the chip against the external shock. In this paper, we introduce the underfill methods using mold and plunge and improvement of process and reliability, and the advantage which can be taken from embodiment of device.

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A study on the Width Measurement of Image Patterns Using Gaussian Interpolation (가우시간 보간을 이용한 영상 패턴의 폭 측정에 관한 연구)

  • Kim, Gyung Bum
    • Journal of the Semiconductor & Display Technology
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    • v.21 no.3
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    • pp.12-16
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    • 2022
  • In this paper, a method for measuring image pattern widths is proposed using gaussian interpolation, in order to improve inconsistent results coming from the different directions in image patterns. The performance of our method is evaluated using image patterns with 9 directions, and compared with previous methods. It is confirmed that the proposed method gives accurate and consistent width results regardless of pattern directions.

Effects of Process Induced Damages on Organic Gate Dielectrics of Organic Thin-Film Transistors

  • Kim, Doo-Hyun;Kim, D.W.;Kim, K.S.;Moon, J.S.;KIM, H.J.;Kim, D.C.;Oh, K.S.;Lee, B.J.;You, S.J.;Choi, S.W.;Park, Y.C.;Kim, B.S.;Shin, J.H.;Kim, Y.M.;Shin, S.S.;Hong, Mun-Pyo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1220-1224
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    • 2007
  • The effects of plasma damages to the organic thin film transistor (OTFT) during the fabrication process are investigated; metal deposition process on the organic gate insulator by plasma sputtering mainly generates the process induced damages of bottom contact structured OTFTs. For this study, various deposition methods (thermal evaporation, plasma sputtering, and neutral beam based sputtering) and metals (gold and Indium-Tin Oxide) have been tested for their damage effects onto the Poly 4-vinylphenol(PVP) layer surface as an organic gate insulator. The surface damages are estimated by measuring surface energies and grain shapes of organic semiconductor on the gate insulator. Unlike thermal evaporation and neutral beam based sputtering, conventional plasma sputtering process induces serious damages onto the organic surface as increasing surface energy, decreasing grain sizes, and degrading TFT performance.

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