• Title/Summary/Keyword: Discrete Current Control

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Advanced Algorithm for IED of Stator Winding Protection of Generator System (발전기시스템의 고정자보호 IED를 위한 개선된 알고리즘)

  • Park, Chul-Won
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.57 no.2
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    • pp.91-95
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    • 2008
  • The large AC generator fault may lead to large impacts or perturbations in power system. The generator protection control systems in Korea have been imported and operated through a turn-key from overseas entirely. Therefore a study of the generator protection field has in urgent need for a stable operation of the imported goods. In present, the algorithm using the current ratio differential relaying based DFT for stator winding protection or a fault detection had been applied that of internal fault protection of a generator. the DFT used for the analysis of transient state signal conventionally had defects losing a time information in the course of transforming a target signal to frequency domain. In this paper, the discrete wavelet transform (DWT) was applied a fault detection of the generator being superior to a transient state signal analysis and being easy to real time realization. The fault signals after executing a terminal fault modeling collect using a MATLAB package, and calculate the wavelet coefficients through the process of a muiti-level decomposition (MLD). The proposed algorithm for a fault detection using the Daubechies WT (wavelet transform) was executed with a C language and the commend line function for the real time realization after analyzing MATLAB's graphical interface. The advanced technique had improved faster a speed of fault discrimination than a conventional DFR based on DFT.

Analog Front-End IC for Automotive Battery Sensor (차량 배터리 센서용 Analog Front-End IC 설계)

  • Yeo, Jae-Jin;Jeong, Bong-Yong;Roh, Jeong-Jin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.10
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    • pp.6-14
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    • 2011
  • This paper presents the design of the battery sensor IC for instrumentation of current, voltage using delta-sigma ADC. The proposed circuit consists of programmable gain instrumentation amplifier (PGIA) and second-order discrete-time delta-sigma modulator with 1-bit quantization were fabricated by a 0.25 ${\mu}m$ CMOS technology. Design circuit show that the modulator achieves 82 dB signal-to-noise ratio (SNR) over a 2 kHz signal bandwidth with an oversampling ratio (OSR) of 256 and differential nonlinearity (DNL) of ${\pm}$ 0.3 LSB, integral nonlinearity (INL) of ${\pm}$ 0.5 LSB. Power consumption is 4.5 mW.

Performance Analysis of Opportunistic Spectrum Access Protocol for Multi-Channel Cognitive Radio Networks

  • Kim, Kyung Jae;Kwak, Kyung Sup;Choi, Bong Dae
    • Journal of Communications and Networks
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    • v.15 no.1
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    • pp.77-86
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    • 2013
  • Cognitive radio (CR) has emerged as one of effective methods to enhance the utilization of existing radio spectrum. Main principle of CR is that secondary users (SUs) are allowed to use the spectrum unused by primary users (PUs) without interfering PU's transmissions. In this paper, PUs operate on a slot-by-slot basis and SUs try to exploit the slots unused by PUs. We propose OSA protocols in the single channel and we propose an opportunistic spectrum access (OSA) protocols in the multi-channel cognitive radio networks with one control channel and several licensed channels where a slot is divided into contention phase and transmission phase. A slot is divided into reporting phase, contention phase and transmission phase. The reporting phase plays a role of finding idle channels unused by PUs and the contention phase plays a role of selecting a SU who will send packets in the data transmission phase. One SU is selected by carrier sense multiple access / collision avoidance (CSMA/CA) with request to send / clear to send (RTS/CTS) mechanism on control channel and the SU is allowed to occupy all remaining part of all idle channels during the current slot. For mathematical analysis, first we deal with the single-channel case and we model the proposed OSA media access control (MAC) protocol by three-dimensional discrete time Markov chain (DTMC) whose one-step transition probability matrix has a special structure so as to apply the censored Markov chain method to obtain the steady state distribution.We obtain the throughput and the distribution of access delay. Next we deal with the multi-channel case and obtain the throughput and the distribution of access delay by using results of single-channel case. In numerical results, our mathematical analysis is verified by simulations and we give numerical results on throughput and access delay of the proposed MAC protocol. Finally, we find the maximum allowable number of SUs satisfying the requirements on throughput and access delay.

A Routing Algorithm based on Deep Reinforcement Learning in SDN (SDN에서 심층강화학습 기반 라우팅 알고리즘)

  • Lee, Sung-Keun
    • The Journal of the Korea institute of electronic communication sciences
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    • v.16 no.6
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    • pp.1153-1160
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    • 2021
  • This paper proposes a routing algorithm that determines the optimal path using deep reinforcement learning in software-defined networks. The deep reinforcement learning model for learning is based on DQN, the inputs are the current network state, source, and destination nodes, and the output returns a list of routes from source to destination. The routing task is defined as a discrete control problem, and the quality of service parameters for routing consider delay, bandwidth, and loss rate. The routing agent classifies the appropriate service class according to the user's quality of service profile, and converts the service class that can be provided for each link from the current network state collected from the SDN. Based on this converted information, it learns to select a route that satisfies the required service level from the source to the destination. The simulation results indicated that if the proposed algorithm proceeds with a certain episode, the correct path is selected and the learning is successfully performed.

Study of the experimentation methodology for the counter fire operations by using discrete event simulation (이산사건 시뮬레이션을 활용한 대화력전 전투실험 방법론 연구)

  • Kim, Hyungkwon;Kim, Hyokyung;Kim, Youngho
    • Journal of the Korea Society for Simulation
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    • v.25 no.2
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    • pp.41-49
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    • 2016
  • Counter Fire Operations can be characterized as having a system of systems that key features include situational awareness, command and control systems and highly responsive strike achieved by precision weapons. Current modeling methodology cannot provide an appropriate methodology for a system of systems and utilizes modeling and simulation tools to implement analytic options which can be time consuming and expensive. We explain developing methodology and tools for the effectiveness analysis of the counter fire operations under Network Centric Warfare Environment and suggest how to support a efficient decision making with the methodology and tools. Theater Counter Fire Operations tools consist of Enemy block, ISR block, C2 block and Shooter block. For the convenience of using by domain expert or non simulation expert, it is composed of the environments that each parameter and algorithm easily can be altered by user.

A Capacitance Deviation-to-Time Interval Converter Based on Ramp-Integration and Its Application to a Digital Humidity Controller (램프-적분을 이용한 용량치-시간차 변환기 및 디지털 습도 조절기에의 응용)

  • Park, Ji-Mann;Chung, Won-Sup
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.12
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    • pp.70-78
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    • 2000
  • A novel capacitance deviation-to-time interval converter based on ramp-integration is presented. It consists of two current mirrors, two schmitt triggers, and control digital circuits by the upper and lower sides, symmetrically. Total circuit has been with discrete components. The results show that the proposed converter has a linearity error of less than 1% at the time interval(pulse width) over a capacitance deviation from 295 pF to 375 pF. A capacitance deviation of 40pF and time interval of 0.2 ms was measured for sensor capacitance of 335 pF. Therefore, the high-resolution can be known by counting the fast and stable clock pulses gated into a counter for time interval. The application of a novel capacitance deviation-to time interval converter to a digital humidity controller is also presented. The presented circuit is insensitive to the capacitance difference in disregard of voltage source or temperature deviation. Besides the accuracy, it features the small MOS device count integrable onto a small chip area. The circuit is thus particularly suitable for the on-chip interface.

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Real-Time HIL Simulation of the Discontinuous Conduction Mode in Voltage Source PWM Power Converters

  • Futo, Andras;Kokenyesi, Tamas;Varjasi, Istvan;Suto, Zoltan;Vajk, Istvan;Balogh, Attila;Balazs, Gergely Gyorgy
    • Journal of Power Electronics
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    • v.17 no.6
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    • pp.1535-1544
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    • 2017
  • Advances in FPGA technology have enabled fast real-time simulation of power converters, filters and loads. FPGA based HIL (Hardware-In-the-Loop) simulators have revolutionized control hardware and software development for power electronics. Common time step sizes in the order of 100ns are sufficient for simulating switching frequency current and voltage ripples. In order to keep the time step as small as possible, ideal switching function models are often used to simulate the phase legs. This often produces inferior results when simulating the discontinuous conduction mode (DCM) and disabled operational states. Therefore, the corresponding measurement and protection units cannot be tested properly. This paper describes a new solution for this problem utilizing a discrete-time PI controller. The PI controller simulates the proper DC and low frequency AC components of the phase leg voltage during disabled operation. It also retains the advantage of fast real-time execution of switch-based models when an accurate simulation of high frequency junction capacitor oscillations is not necessary.

High-Order Temporal Moving Average Filter Using Actively-Weighted Charge Sampling (능동-가중치 전하 샘플링을 이용한 고차 시간상 이동평균 필터)

  • Shin, Soo-Hwan;Cho, Yong-Ho;Jo, Sung-Hun;Yoo, Hyung-Joun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.2
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    • pp.47-55
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    • 2012
  • A discrete-time(DT) filter with high-order temporal moving average(TMA) using actively-weighted charge sampling is proposed in this paper. To obtain different weight of sampled charge, the variable transconductance OTA is used prior to charge sampler, and the ratio of charge can be effectively weighted by switching the control transistors in the OTA. As a result, high-order TMA operation can be possible by actively-weighted charge sampling. In addition, the transconductance generated by the OTA is relatively accurate and stable by using the size ratio of the control transistors. The high-order TMA filter has small size, increased voltage gain, and low parasitic effects due to the small amount of switches and sampling capacitors. It is implemented in the TSMC $0.18-{\mu}m$ CMOS process by TMA-$2^2$. The simulated voltage gain is about 16.7 dB, and P1dB and IIP3 are -32.5 dBm and -23.7 dBm, respectively. DC current consumption is about 9.7 mA.

Potential Impact of Timber Supply and Fuel-Wood on the Atmospheric Carbon Mitigation : A Carbon Cycle Modeling Approach (목재공급과 연료용 목재가 대기에 축적된 탄소저감에 미치는 잠재적 영향 : 탄소순환모형 접근법)

  • Lyon, Kenneth S.;Lee, Dug Man
    • Environmental and Resource Economics Review
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    • v.19 no.3
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    • pp.597-632
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    • 2010
  • There is general agreement that global warming is occurring and that the main contributor to this probably is the buildup of green house gasses, GHG, in the atmosphere. Two main contributors are the utilization of fossil fuels and the deforestation of many regions of the world. The burning of fossil fuels increases atmospheric carbon while the burning of fuel-wood reducing fossil fuel consumption along with its forest source maintain an atmospheric carbon level. The standing timber in the forests is a carbon sink, as are wood buildings and structures, and fossil fuel in the ground. This paper is designed to examine a number of current issues related to mitigating the global warming problem through forestry. For this purpose, we develop a modeling approach by integrating timber market, fossil fuel market and carbon cycling model. We use discrete time optimal control theory to identify optimal time paths, the laws of motion, and stationary stats solutions of endogenous variables in the model. On the basis of these results, we identify the optimal amounts of subsidies to be provided or taxes to be imposed by the regulatory agency to mitigate atmospheric carbon accumulation. We also present a numerical example to help illustrate the characteristics of variables in the model when the social cost for atmospheric carbon incrementally shifts upward. A surprising result is that the social cost function for atmospheric carbon has a very smaller impact on the optimal rotation period than previous literature suggested.

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Chemical/Biological/Radiological Protective Facility Entering Time Estimation Simulation with Procedure Analysis (화생방 방호시설의 행동 절차 분석을 통한 진입 소요시간 예측 시뮬레이션)

  • Park, Sun Ho;Lee, Hyun-Soo;Park, Moonseo;Kim, Sooyoung
    • Korean Journal of Construction Engineering and Management
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    • v.15 no.5
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    • pp.40-48
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    • 2014
  • As CBR(Chemical, Biological, and Radiological) attack increases, the importance of CBR protective facilities is being emphasized. When CBR warfare emerges, a task force team, who exist outside of CBR protective facility, should enter the CBR protective facility through neutralizing process in CCA(Contamination Control Area) and TFA(Toxic Free Area). If a bottleneck occurs in the process or zones, the task force team cannot enter the CBR protective facility efficiently and may cause inefficiency in its operation performance or result in casualties. The current design criteria of the CBR protective facility is only limited to ventilation system and it does not consider how much time it takes to enter the facility. Therefore, this research aims to propose the entering time estimation model with discrete event simulation. To make the simulation model, the procedure performed through CCA and TFA is defined and segmented. The actual time of the procedure are measured and adapted for the simulation model. After running the simulation model, variables effecting the entering time are selected for alternatives with adjustments. This entering time estimation model for CBR protective facility is expected to help take time into consideration during the designing phase of CBR protective facility and help CBR protective facility managers to plan facility operation in a more realistic approach.