• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.110-113
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• 1998

An analysis of the relationship between a linear amplifier chain and an analog-to-digital converter(ADC) in a digital microwave widevand receiver, with respect to sensitivity and dynamic range issues, is presented. The effects of gain, third-order intermodulation products and ADC characteristics on the performance of the receiver are illustrated and design criteria for the linear amplifier chain given a specified ADC are developed. A computer program is used to calculate theretical receiver performance based on gain and third-order intermodulation product selections. Simulated results are also presented and compared with theoretical values.

• Proceedings of the IEEK Conference
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• 2002.06d
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• pp.259-262
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• 2002

In this paper, we present a hard disk drive embedded digital satellite receiver with scene change detection for video indexing. This receiver can store, retrieve and classify the broadcast data by implementing an interface between the conventional digital satellite receiver and digital storage media. Using this system, user can obtain more information for efficient video retrieval.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.35 no.2
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• pp.47-54
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• 1986

Hardware implementation of a 32-channel MFC digital receiver has not been easy and simple, because it requires real time processing of PCM data. In this paper, we introduce a method of designing an MFC digital receiver compactly by the channel distribution method. We have implemented the MFC digital receiver to process many cnannels by distributing channels of the TDM input data directly to the commercial digital signal processor chips(NEC uPD7720), and by carrying out the modified Goertzel Algorithm. The design of low cost, reliable, high speed, and compact MFC receiver will be shown.

• Journal of the Korea Society of Computer and Information
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• v.24 no.7
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• pp.71-78
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• 2019

This paper describes a design for a RF receiver to receive satellite digital audio service. The RF receiver designed in this study is a planar structure that is easy to install on the rooftop of a car and is compact in size. In addition, it can be applied to certain commercial models because it has low noise and high gain characteristics. The impedance bandwidth of antenna is 17.8%(415MHz), and the axial ratio is below 3dB as good properties for the bandwidth of 40MHz which is a satellite digital audio service band. Also, it had a broad radiation beamwidth of $95.41^{\circ}$ in H-plane and $117.45^{\circ}$ in E-plane. From the results of the field test of satellite digital audio service reception for the RF receiver, it demonstrated good C/N rate(10.2dB).

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.3
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• pp.371-379
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• 2011

Active phased array antenna structure is used for modern multi-function radars. To search targets in high clutter environment, the radar receiver needs high dynamic range performance. Though active phased array antenna structure lead to increase of SNR, the SFDR is not increased. In this paper, high SFDR receiver of X-band active phased array radar was designed and manufactured. One channel digital receiver is connected to 32 T/R modules and one PCB assembly is composed to 2 channel digital receivers with RF part, ADC part, LO distribution part and digital down conversion part. A commercial FIFO board was used for digital receiver measurement about major performance in digital output signal condition. The measured digital receiver gain and SFDR is 33 dB and more than 81 dBc each.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2002.11a
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• pp.44-48
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• 2002

This paper describes an adaptive signal processing of digital receiver with DDC(Digital Down Convertor), DDC is implemented by using NCO(Numerically Controlled Oscillator), digital low pass filter. for the passband sampling, we present the results of digital receiver simulation with DDC. We confirm that the low IP signal is converted to zero IF by DDC. DOA(Direction Of Arrival) estimation technique using MUSIC(Multiple SIgnal Classification) algorithm with high resolution is presented. We Cow that an accurate resolution of DOA depends on the input sampling number.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.4 no.4
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• pp.264-271
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• 2011

ILS(Instrument Landing System) is the international standard system for approach and landing guidance. ILS was adopted by ICAO(International Civil Aviation Organization) in 1947 and is currently being used in commercial systems. To design the digital transmitter and receiver modules that can be mounted in the integrated ILS, we propose the digital design methods of digital double AM modulator and demodulator using FPGA chip, DDS(Direct Digital Synthesizer) for generation of sampling clock, demodulator of DDC(Digital Down Converter) structure, and spectrum analyzer using DSP chip. We demonstrate the efficiency of the proposed design method through experiments using developed transmitter and receiver modules. This system can be used as a high-performance commercial system.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.3
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• pp.282-288
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• 2014

In this paper, we have analyzed and designed a digital RF receiver based on the optimization of the dynamic range parameter to secure the wideband characteristics and linearity of digital radar receivers. To improve the wideband characteristics and dynamic range, a low noise amplifier is matching design with a noise source to minimize the noise figure in 1 GHz bandwidth and we improved the linearity of RF-receiver by securing the conversion gain characteristics of receiver through the design of active mixer. RF receiver is designed to give gain 63 dB, noise figure 1.2 dB and dynamic range of RF receiver has 75.8 dB in a wide band of 8.8~9.8 GHz. It is shown to be applicable to X-band digital radar receiver.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.3
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• pp.300-311
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• 2016

The analog-to-digital-converter-based (ADC-based) backplane receivers that consist of a front-end ADC followed by a digital equalizer are gaining more popularity in recent years, as they support more sophisticated equalization required for high data rates, scale better with fabrication technology, and are more immune to PVT variations. Unfortunately, designing an ADC-based receiver that meets tight power and performance budgets of high-speed backplane link systems is non-trivial as both front-end ADC and digital equalizer can be power consuming and complex when running at high speed. This paper reviews the state of art designs for the front-end ADC and digital equalizers to suggest implementation choices that can achieve high speed while maintaining low power consumption and complexity. Design-space exploration using system-level models of the ADC-based receiver allows through analysis on the impact of design parameters, providing useful information in optimizing the power and performance of the receiver at the early stage of design. The system-level simulation results with newer device parameters reveal that, although the power consumption of the ADC-based receiver may not comparable to the receivers with analog equalizers yet, they will become more attractive as the fabrication technology continues to scale as power consumption of digital equalizer scales well with process.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.10
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• pp.2329-2338
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• 1997

A conventional digital receiver sampled a baseband signal and processed it digitally for demodulation. But now we can sample at sufficiently high speed a wideband signal to take enough discrete data values due to the advent of economic high-speed ADC. With this technical background, a wideband frequency-division-multiplexed signal can be undersampled and channelized in digital domain by DFT analysis filter using the theory of polyphase. In this paper, we propose a new digital receiver which can digitally process the multichannel received signal by sampling at IF band, develop a mathematical theory and algorithm, and analyze the performance by using C-language simulaation. The proposed receiver can demodulate analog and digital FM signals.