• Title/Summary/Keyword: Digital phase-shifter

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A C-Band CMOS Bi-Directional T/R Chipset for Phased Array Antenna (위상 배열 안테나를 위한 C-대역 CMOS 양방향 T/R 칩셋)

  • Han, Jang-Hoon;Kim, Jeong-Geun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.7
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    • pp.571-575
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    • 2017
  • This paper presents a C-band bi-directional T/R chipset in $0.13{\mu}m$ TSMC CMOS technology for phased array antenna. The T/R chipset, which is a key component of phased array antenna, consists of a 6 bit phase shifter, a 6 bit step attenuator, and three bi-directional gain amplifiers. The phase shifter is controlled up to $354^{\circ}$ with $5.625^{\circ}$ phase step for precise beam steering. The step attenuator is also controlled up to 31.5 dB with 0.5 dB attenuation step for the side lobe level rejection. The LDO(Low Drop Output) regulator for stable 1.2 V DC power and the SPI(Serial Peripheral Interface) for digital control are integrated in the chipset. The chip size is $2.5{\times}1.5mm^2$ including pads.

Ku band Linear Active phased Array Antenna Design and Fabrication (Ku 대역 선형 능동 위상 배열 안테나 설계 및 제작)

  • Ryu, Sung-Wook;Eom, Soon-Young;Kim, Nam
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.215-216
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    • 2006
  • In this paper, the antenna the with linear active phased array of $1{\times}16$ operated in DBS band was designed. The antenna was composed of sixteen radiating elements, sixteen active channels and five Wilkinson power combiners with 4-channel inputs, a digital control board and a stabilizing DC bias board. The radiating element of the array has the structure of a microstrip stack patch with a left-hand circular polarization. And, each active channel consists of a low noise ampilifier, a 3-bit digital phase shifter and a variable analog attenuator. The breadboard of linear active phased array antenna was also fabricated to test the electrical performances. The radiation patterns of the antenna were measured after correcting initial phases of each active channel in aechoic chamber. And also, the beam scanning chracteristcs of $10^{\circ}$, $20^{\circ}$, $30^{\circ}$ were measured.

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High Efficiency Power Amplifier Based on Digital Pre-Distortion (디지털전치왜곡 기반 고효율 전력증폭기 설계)

  • Kwon, Ki-Dae;Yoon, Wonsik
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.8
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    • pp.1847-1853
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    • 2014
  • The PAPR of the input signal is increased due to OFDMA signal in a mobile communication system. High efficiency of a power amplifier, which accounts for power consumption, is a very important key technology. Digital Pre-Distortion techniques were used to improve the linearity of the power amplifier. The Asymmetric Doherty scheme was used to improve the efficiency of the power amplifier. In this paper, we propose a new structure of Asymmetric Doherty. Drive power amplifier part is separated as main path and peak path, and phase shifter is employed to improve power combine characteristics of the Doherty Amplifier. Also, envelope tracking technology for drive gate bais in drive peak amplifier is used to improve efficiency.

Research on Digital Complex-Correlator of Synthetic Aperture Radiometer: theory and simulation result

  • Jingye, Yan;Ji, Wu;Yunhua, Zhang;Jiang, Changhong;Tao, Wang;Jianhua, Ren;Jingshan, Jiang
    • Proceedings of the KSRS Conference
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    • 2002.10a
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    • pp.587-592
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    • 2002
  • A new digital correlator fur an airborne synthetic aperture radiometer was designed in order to replace the conventional analog correlator unit which will become very complicated while the number of channels is increasing. The digital correlator uses digital IQ demodulator instead of the intermediate frequency (IF) phase shifter to make the correlation processing performed digitally at base band instead of analogly at IF. This technique has been applied to the digital receiver in softradio. The down-converted IF signals from each pair of receiver channels become low rate base-band digital signals after under-sampled, Digitally Down-Converted (DDC), decimated and filtered by FIR filters. The digital signals are further processed by two digital multipliers (complex correlation), the products are integrated by the integrators and finally the outputs from the integrators compose of the real part and the imaginary part of a sample of the visibility function. This design is tested by comparing the results from digital correlators and that from analog correlators. They are agreed with each other very well. Due to the fact that the digital correlators are realized with the help of Analog-Digital Converter (ADC) chips and the FPGA technology, the realized volume, mass, power consumption and complexity turned out to be greatly reduced compared with that of the analog correlators. Simulations show that the resolution of ADC has an influence on the synthesized antenna patterns, but this can be neglected if more than 2bit is used.

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The Cycle Analysis of 4 Valve-type Pulse Tube Refrigerator (4 밸브형 맥동관 냉동기의 사이클 해석)

  • Cho, Kyung-Chul;Lee, Sang-Won;Lim, Young-Hun;Kim, Soo-Yun;Jung, Pyung-Suk
    • Proceedings of the KSME Conference
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    • 2001.06d
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    • pp.636-641
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    • 2001
  • In this paper, we constructed four valve type pulse tube refrigerator and found the characteristic of orifice (needle valve) opening for using phase shifter and optimum cycle time - The valve timing was controlled by the digital timers. The experimental results showed the optimum frequence and cycle time at operating conditions. The results showed that the optimum process time existed and the rate was same at each operating frequence. The no- load temperature of the refrigerator was 85K.

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High Performance Image Downscaler using Two-Dimensional Phase-Correction Digital Filters (이차원 위상-교정 디지털펄터를 이용한 고성능 영상 축소기)

  • Lee, Youngho;Bongsoon Kang;Changhee Hong
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.344-347
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    • 1999
  • 본 논문에서는 이차원 위상-교정 디지털필터를 이용한 고화질 디지털 영상축소기에 관한 알고리듬과 하드웨어 구조를 제안한다. 제안된 축소기는 수직방향으로 1/32 line과 수평방향으로 1/64 pixel의 정밀도를 가진 비선형 위상 필터를 사용하여 고화질의 축소 화상을 제공한다. 최적화된 하드웨어 구조를 달성하기 위하여, 디지털필터는 shifter와 adder를 이용하여 구성한다. 마지막으로 시뮬레이션을 통해서 기존의 1/32scale[1]의 결과와 비교하여 제안된 방법의 우수성을 보인다.

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Symbol Error Probability of DVB-S2 System with I/Q Unbalances (I/Q 불균형이 고려된 DVB-S2 시스템의 심벌 오류 확률)

  • Im, In-Chul;Won, Seung-Chan;Yoon, Dong-Weon;Park, Sang-Kyu
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.9C
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    • pp.810-819
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    • 2007
  • The I/Q unbalance which is generated by non-ideal components such as a $90^{\circ}$ phase shifter and I/Q filters is an inevitable physical phenomenon and leads to performance degradation when we implement a coherent two-dimensional (2-D) modulation/demodulation system. This paper provides an exact and general expression for the SEP(symbol error probability) of DVB-S2 system with I/Q phase and amplitude unbalance over AWGN channel. Coordinate rotation and shift techniques used to redefine a received signal are key mathematical tools. In conclusion, the derived result is expressed as a linear combination of the 2-D Gaussian Q-functions.

Integrated Sliding-Mode Sensorless Driver with Pre-driver and Current Sensing Circuit for Accurate Speed Control of PMSM

  • Heo, Sewan;Oh, Jimin;Kim, Minki;Suk, Jung-Hee;Yang, Yil Suk;Park, Ki-Tae;Kim, Jinsung
    • ETRI Journal
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    • v.37 no.6
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    • pp.1154-1164
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    • 2015
  • This paper proposes a fully sensorless driver for a permanent magnet synchronous motor (PMSM) integrated with a digital motor controller and an analog pre-driver, including sensing circuits and estimators. In the motor controller, a position estimator estimates the back electromotive force and rotor position using a sliding-mode observer. In the pre-driver, drivers for the power devices are designed with a level shifter and isolation technique. In addition, a current sensing circuit measures a three-phase current. All of these circuits are integrated in a single chip such that the driver achieves control of the speed with high accuracy. Using an IC fabricated using a $0.18{\mu}m$ BCDMOS process, the performance was verified experimentally. The driver showed stable operation in spite of the variation in speed and load, a similar efficiency near 1% compared to a commercial driver, a low speed error of about 0.1%, and therefore good performance for the PMSM drive.

T/R Module Development for X-Band Active Phased-Array Radar (능동 위상 배열 레이더용 X-대역 T/R 모듈 개발)

  • Kim, Dong-Yoon;Chong, Min-Kil;Kim, Sang-Keun;Chon, Sang-Mi;Na, Hyung-Gi;Baik, Seung-Hun;Ahn, Chang-Soo;Kim, Seon-Joo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.12
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    • pp.1243-1251
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    • 2009
  • This paper presents design and test results of X-Band Transmit/Receive(T/R) module for active phased-array radar. Active phased array radars typically require solid state T/R modules with high output power, low noise figure, high Third Order Intercept(TOI), and sufficient gain in both transmit and receive. The output power of the module is 9 watts over a wide bandwidth. The noise figure is as low as 2.8 dB. Phase and amplitude are controlled by the 6-bit phase shifter and 5-bit attenuator, respectively. Highly integrated T/R module is achieved by using LTCC(Low Temperature Co-fired Ceramic) multiple layer substrate. The module incorporates a compact digital interface, requires only three supply voltages.

Beam selection method for millimeter-wave-based uplink hybrid beamforming systems (밀리미터파 기반 상향링크 하이브리드 빔포밍 시스템을 위한 빔선택 방법)

  • Shin, Joon-Woo
    • Journal of Advanced Marine Engineering and Technology
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    • v.40 no.9
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    • pp.818-823
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    • 2016
  • Millimeter wave (mm-wave) communication systems provide high data rates owing to the large bandwidths available at mm-wave frequencies. Recently, analogue and digital combined beamforming, namely "hybrid beamforming" has drawn attentions owing to its ability to realize the required link margins in mm-wave systems. Taking into account the radio frequency (RF) hardware limitations, such as the analogue phase shifter gain constraint and the low resolution of the phase controller, we introduce an uplink hybrid beamforming system that includes discrete Fourier transform (DFT) based "fixed" analogue beamforming. We adopt a zero-forcing (ZF) multiple-input multiple-output (MIMO) equalizer to eliminate the uplink inter-user interferences. Moreover, to improve the sum-rate performances, we propose a transmit beam selection algorithm which makes the uplink effective channels, i.e., the beamformed channels, become near orthogonal. The effectiveness of the proposed beam selection algorithm was verified through numerical simulations.