• 전자공학회논문지
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• 제52권6호
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• pp.137-143
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• 2015

Field-programmable gate array (FPGA) 기반 시간-디지털 변환기 (time-to-digital converter: TDC)는 구조가 단순하고, 빠른 변환속도를 갖는 딜레이 라인 (delay-line) 방식을 주로 사용한다. 하지만 딜레이 라인 방식 TDC의 시간 측정범위를 늘리기 위해서는 딜레이 라인의 길이가 길어지므로 사용되는 소자가 많아지고, 비선형성으로 인한 오차가 증가하는 단점이 있다. 따라서 본 논문은 동일한 길이의 딜레이 라인에 펄스 트레인 (pulse-train)을 입력하여 시간 측정범위를 향상시키고, 리소스를 효율적으로 사용하는 방식을 제안한다. 펄스 트레인 입력 방식의 TDC는 긴 시간을 측정하기 위하여 시작신호의 입력과 동시에 4-천이 (transition) 펄스 트레인이 딜레이 라인에 입력된다. 그리고 동기회로 (synchronizer) 대신 천이 상태 검출부를 설계하여 중지신호 입력 시 사용된 천이를 판별하고, 준안정 상태 (meta-stable state)를 피하면서 딜레이 라인의 길이를 줄이는 구조를 갖는다. 제안한 TDC는 72개의 딜레이 셀 (delay cell)을 사용하였고, 파인부 (fine interpolator)의 성능 측정 결과, 시간 측정범위는 5070 ps, 평균 분해능은 20.53 ps, 최대 비선형성은 1.46 LSB였으며, 시간 측정범위는 계단 (step) 파형을 입력신호로 사용하는 기존 방식 대비 약 343 % 향상되었다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제12권12호
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• pp.5860-5876
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• 2018

A single snapshot data can only provide limited amount of information so that the rank of covariance matrix is not full, which is not adopted to complete the parameter estimation directly using the traditional super-resolution method. Aiming at solving the problem, a joint time delay and angle estimation using matrix pencil method based on information reconstruction vector for orthogonal frequency division multiplexing (OFDM) signal is proposed. Firstly, according to the channel frequency response vector of each array element, the algorithm reconstructs the vector data with delay and angle parameter information from both frequency and space dimensions. Then the enhanced data matrix for the extended array element is constructed, and the parameter vector of time delay and angle is estimated by the two-dimensional matrix pencil (2D MP) algorithm. Finally, the joint estimation of two-dimensional parameters is accomplished by the parameter pairing. The algorithm does not need a pseudo-spectral peak search, and the location of the target can be determined only by a single receiver, which can reduce the overhead of the positioning system. The theoretical analysis and simulation results show that the estimation accuracy of the proposed method in a single snapshot and low signal-to-noise ratio environment is much higher than that of Root Multiple Signal Classification algorithm (Root-MUSIC), and this method also achieves the higher estimation performance and efficiency with lower complexity cost compared to the one-dimensional matrix pencil algorithm.

• 대한청각학회지
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• 제24권4호
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• pp.174-179
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• 2020

Background and Objectives: The integration of auditory-visual speech information improves speech perception; however, if the auditory system input is disrupted due to hearing loss, auditory and visual inputs cannot be fully integrated. Additionally, temporal coincidence of auditory and visual input is a significantly important factor in integrating the input of these two senses. Time delayed acoustic pathway caused by the signal passing through digital signal processing. Therefore, this study aimed to investigate the effects of hearing loss and hearing aid digital delay circuit on sound-induced flash illusion. Subjects and Methods: A total of 13 adults with normal hearing, 13 with mild to moderate hearing loss, and 13 with moderate to severe hearing loss were enrolled in this study. Subsequently, the sound-induced flash illusion test was conducted, and the results were analyzed. Results: The results showed that hearing aid digital delay and hearing loss had no detrimental effect on sound-induced flash illusion. Conclusions: Transmission velocity and neural transduction rate of the auditory inputs decreased in patients with hearing loss. Hence, the integrating auditory and visual sensory cannot be combined completely. Although the transmission rate of the auditory sense input was approximately normal when the hearing aid was prescribed. Thus, it can be concluded that the processing delay in the hearing aid circuit is insufficient to disrupt the integration of auditory and visual information.

• Transactions on Control, Automation and Systems Engineering
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• 제2권2호
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• pp.98-103
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• 2000

This paper is concerned with a delay-dependent sliding mode scheme for the robust stabilization of input-delay systems with bounded unknown uncertainties. A sliding surface based ona predictor is proposed to minimize the effect of the input delay. Then, a robust control law is derived to ensure the existence of a sliding mode on the surface. In input-delay systems, uncertainties given during te delayed time are not directly controlled by the switching control because of causality prolem of them. They can influence the stability of the system in the sliding mode. Hence, a delay-dependent stability analysis for reduced order dynamics is employed to estimate maximum delay bound such that the system is globally asymptotically stable in the sliding mode. A numerical example is given to illustrate the design procedure.

• 전자공학회논문지
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• 제51권8호
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• pp.156-164
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• 2014

Field programmable gate array 기반 시간-디지털 변환기(Time to Digital Converter)로 가장 널리 사용되는 딜레이 라인(tapped delay line) 방식은 딜레이 라인의 길이가 길어지면 정확도가 떨어지는 단점이 있다. 이에 본 논문에서는 동일한 시간 해상도를 가지면서 딜레이 라인의 길이를 줄일 수 있도록 4 위상 클럭을 사용하고 이중 상태 판별 제어부를 가지는 시간-디지털 변환기 구조를 제안한다. 4 위상 클럭 별로 딜레이 라인 구성 시 발생하는 라인 간 딜레이 오차를 줄이기 위해 입력신호와 가장 가까운 클럭과의 시간 차이만 하나의 딜레이 라인으로 측정하고 어떤 위상 클럭이 사용되었는지를 판별하는 구조를 가졌다. 또한 싱크로나이저 대신 이중 상태 측정 state machine을 이용하여 메타스태이블을 판별함으로써, 싱크로나이저로 인한 딜레이 라인의 증가를 억제하였다. 제안한 시간-디지털 변환기(TDC)의 성능 측정 결과 1 ms의 측정 시간 범위에 대해 평균 분해능 22 ps, 최대 표준편차 90 ps을 가지며 비선형성은 25 ps였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.245-248
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• 2000

In this paper a novel method for voltage disturbance detection is presented. This is a instantaneous detection method using normalized error get in synchronous reference frame and also it is implemented in digital. Feedback noise the problem of digital implementation is removed by a digital filter of which the time delay is compensated through numerical analysis.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1990년도 한국자동제어학술회의논문집(국제학술편); KOEX, Seoul; 26-27 Oct. 1990
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• pp.868-871
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• 1990

We derive an intelgral-type constraint on the complementary sensitivity function in digital control systems. Some design guidances are proposed for the pole assignment of digital controller with computation-time delay to improve the complementary sensitivity characteristics.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 F
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• pp.2028-2032
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• 1997

When a high performance current control is desired, a computation time delay of a digital control system may deteriorate the control performance of a current controller. Such a non-negligible effect can be considerable in transient state. This paper deals with the modified predictive current control that compensates the time delay effects of a conventional predictive current control. The method is closely related to a local average current control and a symmetrical PWM pattern generation. Also some theoretical approaches are presented to describe the voltage saturation boundary of the power converter. For validation, the proposed method is applied to an active power filter system. The experimental results show considerable improvement in current tracking capability.

• 한국정보통신학회논문지
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• 제1권1호
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• pp.55-64
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• 1997

스펙트럼 확산통신(SS)은 CDMA 시스템의 핵심기술이다. 그러나, 스펙트럼확산 통신 방식에 있어서 가장 중요한 문제는 동기방식이다. 동기방식 에는 Delay Locked Loop (DLL), Tau-dither, SO(Synchronous Oscillator) 등이 있다. 그러나, 이러한 것들은 아날로그 동작이기 때문에 조정이 어렵고 크기가 크다는 단점이 있다. 본 연구에서는, Digital Delay Locked Loop (DDLL)을 설계 제작하고 그의 성능을 전력선 전송시스템 실험을 통하여 평가하였다.

• 대한의용생체공학회:학술대회논문집
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• 대한의용생체공학회 1997년도 추계학술대회
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• pp.567-570
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• 1997

In a conventional digital beamformer received signal were sampled at least Nyquist rate of its maximum frequency. But it is wide band signal and its coherent sum must be obtained, the sampling clock of about $8f_o$ and $16f_o$ is necessary or high quality images. This paper described how image qualities are varied according to sampling clock. Mainly, we compared the SDF(Sampled Delay Focusing) that had maximum precision of $8f_o$ with $16f_o$ sampling system and analyze its characteristics.