• Title/Summary/Keyword: Digital delay

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Channel and Gate Workfunction-Engineered CNTFETs for Low-Power and High-Speed Logic and Memory Applications

  • Wang, Wei;Xu, Hongsong;Huang, Zhicheng;Zhang, Lu;Wang, Huan;Jiang, Sitao;Xu, Min;Gao, Jian
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.1
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    • pp.91-105
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    • 2016
  • Carbon Nanotube Field-Effect Transistors (CNTFETs) have been studied as candidates for post Si CMOS owing to the better electrostatic control and high mobility. To enhance the immunity against short - channel effects (SCEs), the novel channel and gate engineered architectures have been proposed to improve CNTFETs performance. This work presents a comprehensive study of the influence of channel and gate engineering on the CNTFET switching, high frequency and circuit level performance of carbon nanotube field-effect transistors (CNTFETs). At device level, the effects of channel and gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. This model is based on two-dimensional non-equilibrium Green's functions (NEGF) solved self - consistently with Poisson's equations. It is revealed that hetero - material - gate and lightly doped drain and source CNTFET (HMG - LDDS - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, improve the switching speed, and is more suitable for use in low power, high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the impact of the channel and gate engineering on basic digital circuits (inverter, static random access memory cell) have been investigated systematically. The performance parameters of circuits have been calculated and the optimum metal gate workfunction combinations of ${\Phi}_{M1}/{\Phi}_{M2}$ have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product (PDP). In addition, we discuss and compare the CNTFET-based circuit designs of various logic gates, including ternary and binary logic. Simulation results indicate that LDDS - HMG - CNTFET circuits with ternary logic gate design have significantly better performance in comparison with other structures.

Implementation of Stopping Criterion Algorithm using Variance Values of LLR in Turbo Code (터보부호에서 LLR 분산값을 이용한 반복중단 알고리즘 구현)

  • Jeong Dae-Ho;Kim Hwan-Yong
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.9 s.351
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    • pp.149-157
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    • 2006
  • Turbo code, a kind of error correction coding technique, has been used in the field of digital mobile communication system. As the number of iterations increases, it can achieves remarkable BER performance over AWGN channel environment. However, if the number of iterations is increased in the several channel environments, any further iteration results in very little improvement, and requires much delay and computation in proportion to the number of iterations. To solve this problems, it is necessary to device an efficient criterion to stop the iteration process and prevent unnecessary delay and computation. In this paper, it proposes an efficient and simple criterion for stopping the iteration process in turbo decoding. By using variance values of LLR in turbo decoder, the proposed algerian can largely reduce the average number of iterations without BER performance degradation in all SNR regions. As a result of simulation, the average number of iterations in the upper SNR region is reduced by about $34.66%{\sim}41.33%$ compared to method using variance values of extrinsic information. the average number of iterations in the lower SNR region is reduced by about $13.93%{\sim}14.45%$ compared to CE algorithm and about $13.23%{\sim}14.26%$ compared to SDR algorithm.

An Anti-Collision Algorithm with 4-Slot in RFID Systems (RFID 시스템에서 4 슬롯을 이용한 충돌방지 알고리즘)

  • Kim, Yong-Hwan;Kim, Sung-Soo;Ryoo, Myung-Chun;Park, Joon-Ho;Chung, Kyung-Ho
    • Journal of the Korea Society of Computer and Information
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    • v.19 no.12
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    • pp.111-121
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    • 2014
  • In this paper, we propose tree-based hybrid query tree architecture utilizing time slot. 4-Bit Pattern Slot Allocation(4-SL) has a 8-ary tree structure and when tag ID responses according to query of the reader, it applies a digital coding method, the Manchester code, in order to extract the location and the number of collided bits. Also, this algorithm can recognize multiple Tags by single query using 4 fixed time slots. The architecture allows the reader to identify 8 tags at the same time by responding 4 time slots utilizing the first bit($[prefix+1]^{th}$, F ${\in}$ {'0' or '1'}) and bit pattern from second ~ third bits($[prefix+2]^{th}{\sim}[prefix+3]^{th}$, $B_2{\in}$ {"00" or "11"}, $B_1{\in}$ {"01" or "10"}) in tag ID. we analyze worst case of the number of query nodes(prefix) in algorithm to extract delay time for recognizing multiple tags. The identification delay time of the proposed algorithm was based on the number of query-responses and query bits, and was calculated by each algorithm.

A 32${\times}$32-b Multiplier Using a New Method to Reduce a Compression Level of Partial Products (부분곱 압축단을 줄인 32${\times}$32 비트 곱셈기)

  • 홍상민;김병민;정인호;조태원
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.6
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    • pp.447-458
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    • 2003
  • A high speed multiplier is essential basic building block for digital signal processors today. Typically iterative algorithms in Signal processing applications are realized which need a large number of multiply, add and accumulate operations. This paper describes a macro block of a parallel structured multiplier which has adopted a 32$\times$32-b regularly structured tree (RST). To improve the speed of the tree part, modified partial product generation method has been devised at architecture level. This reduces the 4 levels of compression stage to 3 levels, and propagation delay in Wallace tree structure by utilizing 4-2 compressor as well. Furthermore, this enables tree part to be combined with four modular block to construct a CSA tree (carry save adder tree). Therefore, combined with four modular block to construct a CSA tree (carry save adder tree). Therefore, multiplier architecture can be regularly laid out with same modules composed of Booth selectors, compressors and Modified Partial Product Generators (MPPG). At the circuit level new Booth selector with less transistors and encoder are proposed. The reduction in the number of transistors in Booth selector has a greater impact on the total transistor count. The transistor count of designed selector is 9 using PTL(Pass Transistor Logic). This reduces the transistor count by 50% as compared with that of the conventional one. The designed multiplier in 0.25${\mu}{\textrm}{m}$ technology, 2.5V, 1-poly and 5-metal CMOS process is simulated by Hspice and Epic. Delay is 4.2㎱ and average power consumes 1.81㎽/MHz. This result is far better than conventional multiplier with equal or better than the best one published.

8VSB Equalization Techniques for the Performance Improvement of Indoor Reception (실내 수신 성능 개선을 위한 8VSB의 등화 기법)

  • 김대진;박성우;이종주;전희영;이동두;박재홍
    • Journal of Broadcast Engineering
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    • v.4 no.2
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    • pp.103-118
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    • 1999
  • This paper analyzes the performance of symbol timing recovery and equalizer in 8VSB digital terrestrial TV receiver under various multipath signals and proposes equalization techniques which improve indoor reception performance. Data segment sync is used for symbol timing recovery and timing offset is measured for echoes of various delays and amplitudes by using symbol timing detection filter whose pattern is +1. +1. -1. and -1. Measured timing offsets were below 10% for long echoes with more than 5 symbol delay and above 30% for short echoes with around 1 symbol delay. Indoor reception is always more challenging than outdoor reception due to lower signal strength. large and short multipaths. and moving interfering objects. So it is considered to use FSE (Fractionally Spaced Equalizer) which is very robust to timing offset and blind equalizer which can update equalizer tap coefficients even by information data. We compare the performance of conventional DFE (Decision Feedback Equalizer) and FSE-DFE using LMS algorithm and Stop and Go algorithm for the indoor reception. Experiments reveals FSE has excellent performance for large timing offset and Stop and Go algorithm shows good performance for Doppler shift. so we propose to use FSE-DFE structure with Stop and Go algorithm for the reliable indoor reception.

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Reduction of Authentication Cost Based on Key Caching for Inter-MME Handover Support (MME 도메인간 핸드오버 지원을 위한 키캐싱 기반 인증비용의 감소기법)

  • Hwang, Hakseon;Jeong, Jongpil
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.13 no.5
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    • pp.209-220
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    • 2013
  • Handover is the technology to minimize data lose of mobile devices and make continuous communication possible even if the device could be moved from one digital cell site to another one. That is, it is a function that enables the mobile user to avoid the disconnection of phone conversations when moving from a specific mobile communication area to another. Today, there are a lot of ongoing researches for fast and efficient hand-over, in order to address phone call's delay and disconnection which are believed to be the mobile network's biggest problems, and these should essentially be resolved in all mobile networks. Thanks to recent technology development in mobile network, the LTE network has been commercialized today and it has finally opened a new era that makes it possible for mobile phones to process data at high speed. In LTE network environment, however, a new authentication key must be generated for the hand-over. In this case, there can be a problem that the authentication process conducted by the hand-over incurs its authentication cost and delay time. This essay suggests an efficient key caching hand-over method which simplifies the authentication process: when UE makes hand-over from oMME to nMME, the oMME keeps the authentication key for a period of time, and if it returns to the previous MME within the key's lifetime, the saved key can be re-used.

Scattering Characteristic from Building Walls with Periodic and Random Surface (규칙적 또는 불규칙적 구조를 가지는 빌딩벽면에서의 전자파 산란 특성)

  • 윤광렬
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.4
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    • pp.428-435
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    • 2004
  • With the rapid and wide-spread use of cellular telephones much attention has been focussed on propagation in the urban area crowed with buildings and houses. It is often surrounded by hills, forests, and mountains. The importance of surface scattering intereference between transmitters and receivers on the rough surfaces has been interested and investigated. Therefore, a prediction method is necessary to estimate the influence of rough surfaces on microwave radio propagation. Moreover, most of the mobile communications are performed based on the digital communication system rather than the analog one. In this case, we must pay more careful attention to the signal delay caused by the phase delay due to the multi-path propagation. In this paper we have analyzed numerically scattering of electromagnetic waves from building walls by using FVTD(Finite Volume Time Domain) method. We consider three different types of rough surfaces such as periodic, random, and composite structures. We calculate the bistatic normalized radar cross section (NRCS) for horizontal and vertical polarization, and we take account of the conventional optical reflection which corresponds to the n-th Bragg reflection for periodic structures. In addition, we investigated what conditions are needed in order to be able to ignore the higher order Bragg reflection for the periodic structures.

Implementation of Stopping Criterion Algorithm using Sign Change Ratio for Extrinsic Information Values in Turbo Code (터보부호에서 외부정보에 대한 부호변화율을 이용한 반복중단 알고리즘 구현)

  • Jeong Dae-Ho;Shim Byong-Sup;Kim Hwan-Yong
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.7 s.349
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    • pp.143-149
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    • 2006
  • Turbo code, a kind of error correction coding technique, has been used in the field of digital mobile communication system. As the number of iterations increases, it can achieves remarkable BER performance over AWGN channel environment. However, if the number of iterations is increased in the several channel environments, any further iteration results in very little improvement, and requires much delay and computation in proportion to the number of iterations. To solve this problems, it is necessary to device an efficient criterion to stop the iteration process and prevent unnecessary delay and computation. In this paper, it proposes an efficient and simple criterion for stopping the iteration process in turbo decoding. By using sign changed ratio of extrinsic information values in turbo decoder, the proposed algorithm can largely reduce the average number of iterations without BER performance degradation. As a result of simulations, the average number of iterations is reduced by about $12.48%{\sim}22.22%$ compared to CE algorithm and about $20.43%{\sim}54.02%$ compared to SDR algorithm.

The Biomechanical Study on the Timings of Tkatchev Motion in Horizontal Bar (중고등학교 우수 선수의 철봉 Tkatchev 기술의 순간 동작 시점에 관한 운동역학적 연구)

  • Lim, Kyu-Chan
    • Korean Journal of Applied Biomechanics
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    • v.29 no.2
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    • pp.121-128
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    • 2019
  • Objective: The aim of this study was to examine the relation between swing phase and airborne phase of Tkatchev motion which was successfully performed with following motion by excellent middle and high school athletes in horizontal bar. Method: The subjects for this study were 8 male middle and high school top athletes. After their Tkatchev motions were filmed by two digital highspeed camcorders setting in 90 frames/sec at the 44th National Gymnastics against Cities and Provinces, the % lapse time lapse time of each instant, inferred maximum force acting on horizontal bar, and other kinematical variables were calculated through DLT method. After the relations among the % lapse times of each instants of downswing-start, downswing-finish, whipswing-finish, release, peak-height, and lapse time of regrasp, the relation among maximum force acting on bar, % lapse time, peak height, and the relation between % lapse time and release height were examined, the biomechanical timing characteristics of Tkatchev motion were as follows. Results: Firstly, it was revealed that the whole lapse time was $1.62{\pm}.06s$ and the correlation between the % lapse time of downswing-start and % lapse time of release was .819. Secondly, it was revealed that the pattern of COG path was shifted forwardly and tilted 11 clockwise from origin. Thirdly, it was revealed that maximum force acting on bar was inferred in $2,283{\pm}425N$ ($4.7{\pm}.6BW$) and the correlation between maximum force and peak height was r = .893. Lastly, it was revealed that the horizontal and vertical component of body COG velocity was $-2.14{\pm}.29m/s$, $2.70{\pm}.43m/s$ respectively, release height was $.49{\pm}.12m$, and shoulder angle was $139{\pm}5deg$, and that the later the % lapse time of release, the higher the release height (r = .935). Conclusion: It is desired that the gymnastic athletes should delay the downswing-start near the horizontal plane on $2^{nd}$ quadrant because the later the % lapse time of downswing, the higher the release height. After all the higher release height could ensure the athletes to regrasp the bar safely, the athletes should exercise to make downswing-start delay.

A Case Study on the Effects of Occupational Therapy Program on Improving School Readiness in Children With Developmental Delays: Focusing on Adaptation and Daily Living Skills (발달지연 아동의 학교준비도 향상을 위한 작업치료 프로그램 효과에 대한 사례 연구: 적응기술, 일상생활기술 영역을 중심으로)

  • Kim, Eun Ji;Kwak, Bo-Kyeong;Park, Hae Yean
    • Therapeutic Science for Rehabilitation
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    • v.13 no.1
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    • pp.75-86
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    • 2024
  • Objective : The purpose of this study was to examine the effects of an occupational therapy program on the school readiness, focusing on adaptation skills and daily life skills, in children with developmental delays. Methods : The study involved a boy with developmental delay, aged 5 years and 8 months. The program was conducted twice a week, with a total of 8 sessions spread over 4 weeks. The Canadian Occupational Performance Measure (COPM) was employed, targeting class preparation and use of the toilet. Pre-post tests and follow-up evaluations were carried out to compare changes. Data analysis involved video recordings of the subject's performance. Results : The COPM results indicated improvements in both the performance and satisfaction levels for class preparation and toilet use. Processing skills showed seven improvements in class preparation and eight improvements in toilet use during post-testing. Activity performance observations further confirmed improvements in both class preparation and toilet use during post-test and follow-up evaluations. Conclusion : Occupational therapy improves school readiness (adaptation skill, daily living activity skill) for children with developmental delays, and has a positive effect on overall school readiness.