• Title/Summary/Keyword: Digital delay

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Improving the Reception Performance of Legacy T-DMB/DAB Receivers in a Single-Frequency Network with Delay Diversity

  • Baek, Myung-Sun;Lee, Yong-Hoon;Hur, Namho;Kim, Kyung-Seok;Lee, Yong-Tae
    • ETRI Journal
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    • v.36 no.2
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    • pp.188-196
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    • 2014
  • This paper describes a simple delay diversity technique for terrestrial digital multimedia broadcasting (T-DMB) and digital audio broadcasting in a single-frequency network (SFN). For the diversity technique, a delay diversity scheme is adopted. In the delay diversity scheme, a non-delayed signal is transmitted in the first antenna, and delayed versions of the signal are transmitted in each additional antenna. For an SFN environment with multiple transmitters, delay diversity can be executed by controlling the emission times of the transmitters. This SFN delay diversity scheme does not require any hardware changes in either the transmitter or receiver, and perfect backward compatibility can be acquired. To evaluate the performance improvement, laboratory tests are executed with various types of commercial T-DMB receivers as well as a measurement receiver. The improvement in the bit error rate performance is evaluated using a measurement receiver, and an improvement of the threshold of visibility value is evaluated for commercial receivers. Test results show that the T-DMB system can obtain diversity gain using the described technique.

Voltage Feedforward Control with Time-Delay Compensation for Grid-Connected Converters

  • Yang, Shude;Tong, Xiangqian
    • Journal of Power Electronics
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    • v.16 no.5
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    • pp.1833-1842
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    • 2016
  • In grid-connected converter control, grid voltage feedforward is usually introduced to suppress the influence of grid voltage distortion on the converter's grid-side AC current. However, owing to the time-delay in control systems, the suppression effect of the grid voltage distortion is seriously affected. In this paper, the positive effects of the grid voltage feedforward control are analyzed in detail, and the time-delay caused by the low-pass filter (LPF) in the voltage filtering circuits and digital control are summarized. In order to reduce the time-delay effect on the performance of the feedforward control, a voltage feedforward control strategy with time-delay compensation is proposed, in which, a leading correction of the feedforward voltage is used. The optimal leading step used in this strategy is derived from analyzing the phase-frequency characteristics of a LPF and the implementation of digital control. By using the optimal leading step, the delay in the feedforward path can be further counteracted so that the performance of the feedforward control in terms of suppressing the influence of grid voltage distortion on the converter output current can be improved. The validity of the proposed method is verified through simulation and experiment results.

A Digital DLL with 4-Cycle Lock Time and 1/4 NAND-Delay Accuracy

  • Kim, Sung-Yong;Jin, Xuefan;Chun, Jung-Hoon;Kwon, Kee-Won
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.4
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    • pp.387-394
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    • 2016
  • This paper presents a fully digital delay locked loop (DLL) that can acquire lock in four clock cycles with a resolution of a 1/4 NAND-delay. The proposed DLL with a multi-dither-free phase detector acquires the initial lock in four clock cycles with 1/2 NAND-delay. Then, it utilizes a multi-dither-free phase detector, a region accumulator, and phase blenders, to improve the resolution to a 1/4 NAND-delay. The region accumulator which continuously steers the control registers and the phase blender, adaptively controls the tracking bandwidth depending on the amount of jitter, and effectively suppresses the dithering jitter. Fabricated in a 65 nm CMOS process, the proposed DLL occupies $0.0432mm^2$, and consumes 3.7 mW from a 1.2-V supply at 2 GHz.

The effect of the MgO process on the properties of AC-PDPs

  • Kim, Young-Sung;Park, Min-Soo;Ryu, Byung-Gil
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1376-1379
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    • 2007
  • The effects of the MgO fabrication process on the properties of AC-PDPs were examined. MgO films were deposited by e-beam evaporation with various substrate temperatures and oxygen flow rates. MgO films were analyzed by XRD, CL and ellipsometer. Panel properties such as luminance, efficiency, discharge voltage and discharge delay time were measured with test panels. MgO films with higher temperature, smaller oxygen flow rate showed shorter discharge delay time. Also they showed smaller XRD peak intensity. These results revealed that the discharge delay time was strongly influenced by temperature and oxygen flow rate of the MgO fabrication process.

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Design of Pulse Shaping Filter for High-Speed Service in Digital Satellite Broadcasting System (디지털 위성방송 시스템의 고속 서비스를 위한 Pulse Shaping Filter 설계)

  • 오재현;이인섭;이완범;강정용;박형근;김환용
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.337-340
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    • 2002
  • In data transmission at the digital satellite broadcasting systems, the delay and spread are caused whit receiving original signals from the transmitter in the receiver. So, there are some problems in data fast transmission. Also, transmitted signals ate received in stale of the combination of transmission delay and noise of channel. The affect of channel noise is reduced when increasing transmission power, but as signal interference due to the transmission delay and spread of channel increase in proportion to the transmission power, there is a problem in spite of increasing the transmission power. And there is the problem to add ISI(inter symbol interference) because the property of the channel is limo-varying due to relative moving in the transceiver Therefore, in this paper, a pulse shaping filter for the high-speed service in digital satellite broadcasting systems was designed and reduced the ISI.

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Design of Fast and Overshoot Free Digital Current Controller (오버슈트 없는 고속 디지털 전류제어기 설계)

  • 이진우
    • The Transactions of the Korean Institute of Power Electronics
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    • v.5 no.2
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    • pp.163-169
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    • 2000
  • From the viewpoint of the cost effective design of power conversion systems, it is very important to fully u utilize the CillTent capacity of power devices over all circumstances. Therefore this paper deals with the l practical design of digital CillTent controller to meet the requirements of fast and overshoot free control r response over the varying control voltage bOlmds, the accompanied computational delay, and the system U W1certainties. The proposed controller consists of high gain PI control schemes using both the conditional i integrator and the modified delay compensator. The simulation and experimental results show the validity of t the proposed controller.

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Design of a Auto-Tuning Digital PID Controller using Relay feedback and Time Delay (시간 지연 릴레이 피드백을 이용한 자동동조 디지털 PID 제어기의 설계)

  • 류경모;박정일
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.109-109
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    • 2000
  • In process industries, more than 90% of the control loops have PID controller. Futhermore, the most control systems are using classical PID controllers for their process control. Various auto-tuning methods of PID gains using relay-feedback are presented recently. In order to get the desired control performance, the correct tuning of PID controller is very important. This paper suggests how to tune of digital PID gains using information for both the Nyquist critical point by conventional method and another point by the relay feedback and hidden time-delay term. Simulation results show that the proposed controller has better performance than the conventional method.

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Design of a Time-to-Digital Converter without Delay Time (지연시간 없는 시간-디지털 신호 변환기의 설계)

  • Choe, Jin-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.5
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    • pp.323-328
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    • 2001
  • A new time-to-digital converter is proposed which is based on a capacitor and a counter. The conventional time-to-digital converter requires rather longer processing time than the input time interval to obtain an accurate digital output. The resolution of the converted digital output is constant independent on the input time interval. However this study proposes the circuit in which the converted digital output can be obtained without delay time, and both the input time interval and the resolution can be easily improved through controlling passive device parameters.

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An Analysis of ZVS Phase-Shift Full-Bridge Converter's Small Signal Model according to Digital Sampling Method (ZVS 위상천이 풀브릿지 컨버터의 디지털 샘플링 기법에 따른 소신호 모델 분석)

  • Kim, Jeong-Woo;Cho, Younghoon;Choe, Gyu-Ha
    • The Transactions of the Korean Institute of Power Electronics
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    • v.20 no.2
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    • pp.167-174
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    • 2015
  • This study describes how digital time delay deteriorates control performance in zero voltage switching (ZVS) phase-shifted full bridge (PSFB) converter. The small-signal model of the ZVS PSFB converter is derived from the buck-converter small-signal model. Digital time delay effects have been considered according to the digital sampling methods. The analysis verifies that digital time delays reduce the stability margin of the converter, and the double sampling technique exhibits better performance than the single sampling technique. Both simulation and experimental results based on 250 W ZVS PSFB confirm the validity of the analyses performed in the study.

Design of Time Delay Compensator of Three-Level Inverter for Three-Phase UPS Systems (3상 UPS용 3레벨 인버터의 시지연 보상기 설계)

  • Lee, Jin-Woo;Lim, Seung-Beom;Hong, Soon-Chan
    • Proceedings of the KIPE Conference
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    • 2011.11a
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    • pp.63-64
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    • 2011
  • The inevitable calculation time delay of digital controller especially degrades the voltage control performance of three-phase UPS systems. This paper proposes time delay compensators based on the Smith-predictor for both voltage and current controllers of three-level NPC inverters. The PSIM-based simulation results show that the proposed controller with delay compensator gives improved voltage control performance with respect to time delay.

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